ev5.hh (2665:a124942bacb8) ev5.hh (5566:3440c9ad49b4)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31 */
32
33#ifndef __ARCH_ALPHA_EV5_HH__
34#define __ARCH_ALPHA_EV5_HH__
35
36#include "config/alpha_tlaser.hh"
37#include "arch/alpha/isa_traits.hh"
38
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31 */
32
33#ifndef __ARCH_ALPHA_EV5_HH__
34#define __ARCH_ALPHA_EV5_HH__
35
36#include "config/alpha_tlaser.hh"
37#include "arch/alpha/isa_traits.hh"
38
39namespace EV5 {
39namespace AlphaISA {
40
40
41//It seems like a safe assumption EV5 only applies to alpha
42using namespace AlphaISA;
43
44#if ALPHA_TLASER
45const uint64_t AsnMask = ULL(0x7f);
46#else
47const uint64_t AsnMask = ULL(0xff);
48#endif
49
50const int VAddrImplBits = 43;
51const Addr VAddrImplMask = (ULL(1) << VAddrImplBits) - 1;

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115const uint64_t MM_STAT_ACV_MASK = ULL(0x0002);
116const uint64_t MM_STAT_WR_MASK = ULL(0x0001);
117inline int Opcode(AlphaISA::MachInst inst) { return inst >> 26 & 0x3f; }
118inline int Ra(AlphaISA::MachInst inst) { return inst >> 21 & 0x1f; }
119
120const Addr PalBase = 0x4000;
121const Addr PalMax = 0x10000;
122
41#if ALPHA_TLASER
42const uint64_t AsnMask = ULL(0x7f);
43#else
44const uint64_t AsnMask = ULL(0xff);
45#endif
46
47const int VAddrImplBits = 43;
48const Addr VAddrImplMask = (ULL(1) << VAddrImplBits) - 1;

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112const uint64_t MM_STAT_ACV_MASK = ULL(0x0002);
113const uint64_t MM_STAT_WR_MASK = ULL(0x0001);
114inline int Opcode(AlphaISA::MachInst inst) { return inst >> 26 & 0x3f; }
115inline int Ra(AlphaISA::MachInst inst) { return inst >> 21 & 0x1f; }
116
117const Addr PalBase = 0x4000;
118const Addr PalMax = 0x10000;
119
123/* namespace EV5 */ }
120} // namespace AlphaISA
124
125#endif // __ARCH_ALPHA_EV5_HH__
121
122#endif // __ARCH_ALPHA_EV5_HH__