SConscript (4486:aaeb03a8a6e1) | SConscript (4826:259b996a6da6) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2004-2005 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 24 unchanged lines hidden (view full) --- 33 34if env['TARGET_ISA'] == 'alpha': 35 Source('faults.cc') 36 Source('floatregfile.cc') 37 Source('intregfile.cc') 38 Source('miscregfile.cc') 39 Source('regfile.cc') 40 Source('remote_gdb.cc') | 1# -*- mode:python -*- 2 3# Copyright (c) 2004-2005 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 24 unchanged lines hidden (view full) --- 33 34if env['TARGET_ISA'] == 'alpha': 35 Source('faults.cc') 36 Source('floatregfile.cc') 37 Source('intregfile.cc') 38 Source('miscregfile.cc') 39 Source('regfile.cc') 40 Source('remote_gdb.cc') |
41 Source('utility.cc') |
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41 42 if env['FULL_SYSTEM']: 43 SimObject('AlphaSystem.py') 44 SimObject('AlphaTLB.py') 45 | 42 43 if env['FULL_SYSTEM']: 44 SimObject('AlphaSystem.py') 45 SimObject('AlphaTLB.py') 46 |
46 Source('arguments.cc') | |
47 Source('ev5.cc') 48 Source('idle_event.cc') 49 Source('ipr.cc') 50 Source('kernel_stats.cc') 51 Source('osfpal.cc') 52 Source('pagetable.cc') 53 Source('stacktrace.cc') 54 Source('system.cc') --- 22 unchanged lines hidden --- | 47 Source('ev5.cc') 48 Source('idle_event.cc') 49 Source('ipr.cc') 50 Source('kernel_stats.cc') 51 Source('osfpal.cc') 52 Source('pagetable.cc') 53 Source('stacktrace.cc') 54 Source('system.cc') --- 22 unchanged lines hidden --- |