1#
2# Copyright (c) 2010-2015 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# For use for simulation and test purposes only
6#
7# Redistribution and use in source and binary forms, with or without
8# modification, are permitted provided that the following conditions are met:
9#
10# 1. Redistributions of source code must retain the above copyright notice,
11# this list of conditions and the following disclaimer.
12#
13# 2. Redistributions in binary form must reproduce the above copyright notice,
14# this list of conditions and the following disclaimer in the documentation
15# and/or other materials provided with the distribution.
16#
17# 3. Neither the name of the copyright holder nor the names of its contributors
18# may be used to endorse or promote products derived from this software
19# without specific prior written permission.
20#
21# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31# POSSIBILITY OF SUCH DAMAGE.
32#
33# Author: Brad Beckmann
34#
35
36import m5
37from m5.objects import *
38from m5.defines import buildEnv
39from m5.util import addToPath
40import os, optparse, sys
41addToPath('../common')
42addToPath('../ruby')
43addToPath('../topologies')
44
45import Options
46import Ruby
47
48# Get paths we might need.
49config_path = os.path.dirname(os.path.abspath(__file__))
50config_root = os.path.dirname(config_path)
51m5_root = os.path.dirname(config_root)
52
53parser = optparse.OptionParser()
54Options.addCommonOptions(parser)
55
56parser.add_option("--maxloads", metavar="N", default=100,
57 help="Stop after N loads")
58parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
59 help="Wakeup every N cycles")
60parser.add_option("-u", "--num-compute-units", type="int", default=1,
61 help="number of compute units in the GPU")
| 1#
2# Copyright (c) 2010-2015 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# For use for simulation and test purposes only
6#
7# Redistribution and use in source and binary forms, with or without
8# modification, are permitted provided that the following conditions are met:
9#
10# 1. Redistributions of source code must retain the above copyright notice,
11# this list of conditions and the following disclaimer.
12#
13# 2. Redistributions in binary form must reproduce the above copyright notice,
14# this list of conditions and the following disclaimer in the documentation
15# and/or other materials provided with the distribution.
16#
17# 3. Neither the name of the copyright holder nor the names of its contributors
18# may be used to endorse or promote products derived from this software
19# without specific prior written permission.
20#
21# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31# POSSIBILITY OF SUCH DAMAGE.
32#
33# Author: Brad Beckmann
34#
35
36import m5
37from m5.objects import *
38from m5.defines import buildEnv
39from m5.util import addToPath
40import os, optparse, sys
41addToPath('../common')
42addToPath('../ruby')
43addToPath('../topologies')
44
45import Options
46import Ruby
47
48# Get paths we might need.
49config_path = os.path.dirname(os.path.abspath(__file__))
50config_root = os.path.dirname(config_path)
51m5_root = os.path.dirname(config_root)
52
53parser = optparse.OptionParser()
54Options.addCommonOptions(parser)
55
56parser.add_option("--maxloads", metavar="N", default=100,
57 help="Stop after N loads")
58parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
59 help="Wakeup every N cycles")
60parser.add_option("-u", "--num-compute-units", type="int", default=1,
61 help="number of compute units in the GPU")
|
62parser.add_option("--numCPs", type="int", default=0,
| 62parser.add_option("--num-cp", type="int", default=0,
|
63 help="Number of GPU Command Processors (CP)")
64# not super important now, but to avoid putting the number 4 everywhere, make
65# it an option/knob
66parser.add_option("--cu-per-sqc", type="int", default=4, help="number of CUs \
67 sharing an SQC (icache, and thus icache TLB)")
68parser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \
69 "per CU")
70parser.add_option("--wf-size", type="int", default=64,
71 help="Wavefront size(in workitems)")
72parser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \
73 "WF slots per SIMD")
74
75#
76# Add the ruby specific and protocol specific options
77#
78Ruby.define_options(parser)
79
80execfile(os.path.join(config_root, "common", "Options.py"))
81
82(options, args) = parser.parse_args()
83
84#
85# Set the default cache size and associativity to be very small to encourage
86# races between requests and writebacks.
87#
88options.l1d_size="256B"
89options.l1i_size="256B"
90options.l2_size="512B"
91options.l3_size="1kB"
92options.l1d_assoc=2
93options.l1i_assoc=2
94options.l2_assoc=2
95options.l3_assoc=2
96
97# This file can support multiple compute units
98assert(options.num_compute_units >= 1)
99n_cu = options.num_compute_units
100
101options.num_sqc = int((n_cu + options.cu_per_sqc - 1) / options.cu_per_sqc)
102
103if args:
104 print "Error: script doesn't take any positional arguments"
105 sys.exit(1)
106
107#
108# Create the ruby random tester
109#
110
111# Check to for the GPU_RfO protocol. Other GPU protocols are non-SC and will
112# not work with the Ruby random tester.
113assert(buildEnv['PROTOCOL'] == 'GPU_RfO')
114
115# The GPU_RfO protocol does not support cache flushes
116check_flush = False
117
118tester = RubyTester(check_flush=check_flush,
119 checks_to_complete=options.maxloads,
120 wakeup_frequency=options.wakeup_freq,
121 deadlock_threshold=1000000)
122
123#
124# Create the M5 system. Note that the Memory Object isn't
125# actually used by the rubytester, but is included to support the
126# M5 memory size == Ruby memory size checks
127#
128system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)])
129
130# Create a top-level voltage domain and clock domain
131system.voltage_domain = VoltageDomain(voltage=options.sys_voltage)
132
133system.clk_domain = SrcClockDomain(clock=options.sys_clock,
134 voltage_domain=system.voltage_domain)
135
136Ruby.create_system(options, False, system)
137
138# Create a seperate clock domain for Ruby
139system.ruby.clk_domain = SrcClockDomain(clock=options.ruby_clock,
140 voltage_domain=system.voltage_domain)
141
142tester.num_cpus = len(system.ruby._cpu_ports)
143
144#
145# The tester is most effective when randomization is turned on and
146# artifical delay is randomly inserted on messages
147#
148system.ruby.randomization = True
149
150for ruby_port in system.ruby._cpu_ports:
151
152 #
153 # Tie the ruby tester ports to the ruby cpu read and write ports
154 #
155 if ruby_port.support_data_reqs and ruby_port.support_inst_reqs:
156 tester.cpuInstDataPort = ruby_port.slave
157 elif ruby_port.support_data_reqs:
158 tester.cpuDataPort = ruby_port.slave
159 elif ruby_port.support_inst_reqs:
160 tester.cpuInstPort = ruby_port.slave
161
162 # Do not automatically retry stalled Ruby requests
163 ruby_port.no_retry_on_stall = True
164
165 #
166 # Tell each sequencer this is the ruby tester so that it
167 # copies the subblock back to the checker
168 #
169 ruby_port.using_ruby_tester = True
170
171# -----------------------
172# run simulation
173# -----------------------
174
175root = Root( full_system = False, system = system )
176root.system.mem_mode = 'timing'
177
178# Not much point in this being higher than the L1 latency
179m5.ticks.setGlobalFrequency('1ns')
180
181# instantiate configuration
182m5.instantiate()
183
184# simulate until program terminates
185exit_event = m5.simulate(options.abs_max_tick)
186
187print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
| 63 help="Number of GPU Command Processors (CP)")
64# not super important now, but to avoid putting the number 4 everywhere, make
65# it an option/knob
66parser.add_option("--cu-per-sqc", type="int", default=4, help="number of CUs \
67 sharing an SQC (icache, and thus icache TLB)")
68parser.add_option("--simds-per-cu", type="int", default=4, help="SIMD units" \
69 "per CU")
70parser.add_option("--wf-size", type="int", default=64,
71 help="Wavefront size(in workitems)")
72parser.add_option("--wfs-per-simd", type="int", default=10, help="Number of " \
73 "WF slots per SIMD")
74
75#
76# Add the ruby specific and protocol specific options
77#
78Ruby.define_options(parser)
79
80execfile(os.path.join(config_root, "common", "Options.py"))
81
82(options, args) = parser.parse_args()
83
84#
85# Set the default cache size and associativity to be very small to encourage
86# races between requests and writebacks.
87#
88options.l1d_size="256B"
89options.l1i_size="256B"
90options.l2_size="512B"
91options.l3_size="1kB"
92options.l1d_assoc=2
93options.l1i_assoc=2
94options.l2_assoc=2
95options.l3_assoc=2
96
97# This file can support multiple compute units
98assert(options.num_compute_units >= 1)
99n_cu = options.num_compute_units
100
101options.num_sqc = int((n_cu + options.cu_per_sqc - 1) / options.cu_per_sqc)
102
103if args:
104 print "Error: script doesn't take any positional arguments"
105 sys.exit(1)
106
107#
108# Create the ruby random tester
109#
110
111# Check to for the GPU_RfO protocol. Other GPU protocols are non-SC and will
112# not work with the Ruby random tester.
113assert(buildEnv['PROTOCOL'] == 'GPU_RfO')
114
115# The GPU_RfO protocol does not support cache flushes
116check_flush = False
117
118tester = RubyTester(check_flush=check_flush,
119 checks_to_complete=options.maxloads,
120 wakeup_frequency=options.wakeup_freq,
121 deadlock_threshold=1000000)
122
123#
124# Create the M5 system. Note that the Memory Object isn't
125# actually used by the rubytester, but is included to support the
126# M5 memory size == Ruby memory size checks
127#
128system = System(cpu=tester, mem_ranges=[AddrRange(options.mem_size)])
129
130# Create a top-level voltage domain and clock domain
131system.voltage_domain = VoltageDomain(voltage=options.sys_voltage)
132
133system.clk_domain = SrcClockDomain(clock=options.sys_clock,
134 voltage_domain=system.voltage_domain)
135
136Ruby.create_system(options, False, system)
137
138# Create a seperate clock domain for Ruby
139system.ruby.clk_domain = SrcClockDomain(clock=options.ruby_clock,
140 voltage_domain=system.voltage_domain)
141
142tester.num_cpus = len(system.ruby._cpu_ports)
143
144#
145# The tester is most effective when randomization is turned on and
146# artifical delay is randomly inserted on messages
147#
148system.ruby.randomization = True
149
150for ruby_port in system.ruby._cpu_ports:
151
152 #
153 # Tie the ruby tester ports to the ruby cpu read and write ports
154 #
155 if ruby_port.support_data_reqs and ruby_port.support_inst_reqs:
156 tester.cpuInstDataPort = ruby_port.slave
157 elif ruby_port.support_data_reqs:
158 tester.cpuDataPort = ruby_port.slave
159 elif ruby_port.support_inst_reqs:
160 tester.cpuInstPort = ruby_port.slave
161
162 # Do not automatically retry stalled Ruby requests
163 ruby_port.no_retry_on_stall = True
164
165 #
166 # Tell each sequencer this is the ruby tester so that it
167 # copies the subblock back to the checker
168 #
169 ruby_port.using_ruby_tester = True
170
171# -----------------------
172# run simulation
173# -----------------------
174
175root = Root( full_system = False, system = system )
176root.system.mem_mode = 'timing'
177
178# Not much point in this being higher than the L1 latency
179m5.ticks.setGlobalFrequency('1ns')
180
181# instantiate configuration
182m5.instantiate()
183
184# simulate until program terminates
185exit_event = m5.simulate(options.abs_max_tick)
186
187print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
|