memtest.py (4893:3439144e474a) memtest.py (4895:d36959284fbc)
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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139
140# system simulated
141system = System(funcmem = PhysicalMemory(),
142 physmem = PhysicalMemory(latency = "100ns"))
143
144def make_level(spec, prototypes, attach_obj, attach_port):
145 fanout = spec[0]
146 parent = attach_obj # use attach obj as config parent too
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 130 unchanged lines hidden (view full) ---

139
140# system simulated
141system = System(funcmem = PhysicalMemory(),
142 physmem = PhysicalMemory(latency = "100ns"))
143
144def make_level(spec, prototypes, attach_obj, attach_port):
145 fanout = spec[0]
146 parent = attach_obj # use attach obj as config parent too
147 if fanout > 1 or options.force_bus:
147 if len(spec) > 1 and (fanout > 1 or options.force_bus):
148 new_bus = Bus(clock="500MHz", width=16)
149 new_bus.port = getattr(attach_obj, attach_port)
150 parent.cpu_side_bus = new_bus
151 attach_obj = new_bus
152 attach_port = "port"
153 objs = [prototypes[0]() for i in xrange(fanout)]
154 if len(spec) > 1:
155 # we just built caches, more levels to go

--- 33 unchanged lines hidden --- 		148 new_bus = Bus(clock="500MHz", width=16)
149 new_bus.port = getattr(attach_obj, attach_port)
150 parent.cpu_side_bus = new_bus
151 attach_obj = new_bus
152 attach_port = "port"
153 objs = [prototypes[0]() for i in xrange(fanout)]
154 if len(spec) > 1:
155 # we just built caches, more levels to go

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