memtest.py (10887:279efb97ec99) | memtest.py (11053:62544e45c0f4) |
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1# Copyright (c) 2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 161 unchanged lines hidden (view full) --- 170 sys.exit(1) 171 172 if numtesters(cachespec, testerspec) > block_size: 173 print "Error: Limited to %s testers because of false sharing" \ 174 % (block_size) 175 sys.exit(1) 176 177# Define a prototype L1 cache that we scale for all successive levels | 1# Copyright (c) 2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 161 unchanged lines hidden (view full) --- 170 sys.exit(1) 171 172 if numtesters(cachespec, testerspec) > block_size: 173 print "Error: Limited to %s testers because of false sharing" \ 174 % (block_size) 175 sys.exit(1) 176 177# Define a prototype L1 cache that we scale for all successive levels |
178proto_l1 = BaseCache(size = '32kB', assoc = 4, 179 hit_latency = 1, response_latency = 1, 180 tgts_per_mshr = 8) | 178proto_l1 = Cache(size = '32kB', assoc = 4, 179 hit_latency = 1, response_latency = 1, 180 tgts_per_mshr = 8) |
181 182if options.blocking: 183 proto_l1.mshrs = 1 184else: 185 proto_l1.mshrs = 4 186 187cache_proto = [proto_l1] 188 --- 120 unchanged lines hidden --- | 181 182if options.blocking: 183 proto_l1.mshrs = 1 184else: 185 proto_l1.mshrs = 4 186 187cache_proto = [proto_l1] 188 --- 120 unchanged lines hidden --- |