| memtest.py (10705:c6cb94a14fea) | memtest.py (10720:67b3e74de9ae) |
|---|---|
| 1# Copyright (c) 2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 219 unchanged lines hidden (view full) --- 228 progress_check = limit) \ 229 for i in xrange(ntesters)] 230 if ntesters: 231 subsys.tester = testers 232 233 if level != 0: 234 # Create a crossbar and add it to the subsystem, note that 235 # we do this even with a single element on this level | 1# Copyright (c) 2015 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 219 unchanged lines hidden (view full) --- 228 progress_check = limit) \ 229 for i in xrange(ntesters)] 230 if ntesters: 231 subsys.tester = testers 232 233 if level != 0: 234 # Create a crossbar and add it to the subsystem, note that 235 # we do this even with a single element on this level |
| 236 xbar = CoherentXBar(width = 32) | 236 xbar = L2XBar() |
| 237 subsys.xbar = xbar 238 if next_cache: 239 xbar.master = next_cache.cpu_side 240 241 # Create and connect the caches, both the ones fanning out 242 # to create the tree, and the ones used to connect testers 243 # on this level 244 tree_caches = [prototypes[0]() for i in xrange(ncaches[0])] --- 8 unchanged lines hidden (view full) --- 253 cache.mem_side = xbar.slave 254 else: 255 if not next_cache: 256 print "Error: No next-level cache at top level" 257 sys.exit(1) 258 259 if ntesters > 1: 260 # Create a crossbar and add it to the subsystem | 237 subsys.xbar = xbar 238 if next_cache: 239 xbar.master = next_cache.cpu_side 240 241 # Create and connect the caches, both the ones fanning out 242 # to create the tree, and the ones used to connect testers 243 # on this level 244 tree_caches = [prototypes[0]() for i in xrange(ncaches[0])] --- 8 unchanged lines hidden (view full) --- 253 cache.mem_side = xbar.slave 254 else: 255 if not next_cache: 256 print "Error: No next-level cache at top level" 257 sys.exit(1) 258 259 if ntesters > 1: 260 # Create a crossbar and add it to the subsystem |
| 261 xbar = CoherentXBar(width = 32) | 261 xbar = L2XBar() |
| 262 subsys.xbar = xbar 263 xbar.master = next_cache.cpu_side 264 for tester in testers: 265 tester.port = xbar.slave 266 else: 267 # Single tester 268 testers[0].port = next_cache.cpu_side 269 --- 24 unchanged lines hidden --- | 262 subsys.xbar = xbar 263 xbar.master = next_cache.cpu_side 264 for tester in testers: 265 tester.port = xbar.slave 266 else: 267 # Single tester 268 testers[0].port = next_cache.cpu_side 269 --- 24 unchanged lines hidden --- |