fs.py (9790:ccc428657233) fs.py (9793:6e6cefc1db1f)
1# Copyright (c) 2010-2012 ARM Limited
1# Copyright (c) 2010-2013 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

--- 66 unchanged lines hidden (view full) ---

76have_kvm_support = 'BaseKvmCPU' in globals()
77def is_kvm_cpu(cpu_class):
78 return have_kvm_support and cpu_class != None and \
79 issubclass(cpu_class, BaseKvmCPU)
80
81# system under test can be any CPU
82(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
83
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

--- 66 unchanged lines hidden (view full) ---

76have_kvm_support = 'BaseKvmCPU' in globals()
77def is_kvm_cpu(cpu_class):
78 return have_kvm_support and cpu_class != None and \
79 issubclass(cpu_class, BaseKvmCPU)
80
81# system under test can be any CPU
82(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
83
84TestCPUClass.clock = options.cpu_clock
85DriveCPUClass.clock = options.cpu_clock
86
87# Match the memories with the CPUs, the driver system always simple,
88# and based on the options for the test system
89DriveMemClass = SimpleMemory
90TestMemClass = Simulation.setMemClass(options)
91
92if options.benchmark:
93 try:
94 bm = Benchmarks[options.benchmark]

--- 20 unchanged lines hidden (view full) ---

115 options.num_cpus, bm[0])
116elif buildEnv['TARGET_ISA'] == "arm":
117 test_sys = makeArmSystem(test_mem_mode, options.machine_type,
118 TestMemClass, bm[0], options.dtb_filename,
119 bare_metal=options.bare_metal)
120else:
121 fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])
122
84# Match the memories with the CPUs, the driver system always simple,
85# and based on the options for the test system
86DriveMemClass = SimpleMemory
87TestMemClass = Simulation.setMemClass(options)
88
89if options.benchmark:
90 try:
91 bm = Benchmarks[options.benchmark]

--- 20 unchanged lines hidden (view full) ---

112 options.num_cpus, bm[0])
113elif buildEnv['TARGET_ISA'] == "arm":
114 test_sys = makeArmSystem(test_mem_mode, options.machine_type,
115 TestMemClass, bm[0], options.dtb_filename,
116 bare_metal=options.bare_metal)
117else:
118 fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])
119
123test_sys.clock = options.sys_clock
120# Create a source clock for the system and set the clock period
121test_sys.clk_domain = SrcClockDomain(clock = options.sys_clock)
124
122
123# Create a source clock for the CPUs and set the clock period
124test_sys.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock)
125
125if options.kernel is not None:
126 test_sys.kernel = binary(options.kernel)
127
128if options.script is not None:
129 test_sys.readfile = options.script
130
131test_sys.init_param = options.init_param
132
126if options.kernel is not None:
127 test_sys.kernel = binary(options.kernel)
128
129if options.script is not None:
130 test_sys.readfile = options.script
131
132test_sys.init_param = options.init_param
133
133test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
134# For now, assign all the CPUs to the same clock domain
135test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i)
136 for i in xrange(np)]
134
135if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass):
136 test_sys.vm = KvmVM()
137
138if options.caches or options.l2cache:
139 # By default the IOCache runs at the system clock
140 test_sys.iocache = IOCache(addr_ranges = test_sys.mem_ranges)
141 test_sys.iocache.cpu_side = test_sys.iobus.master

--- 27 unchanged lines hidden (view full) ---

169 elif buildEnv['TARGET_ISA'] == 'sparc':
170 drive_sys = makeSparcSystem(drive_mem_mode, DriveMemClass, bm[1])
171 elif buildEnv['TARGET_ISA'] == 'x86':
172 drive_sys = makeX86System(drive_mem_mode, DriveMemClass, np, bm[1])
173 elif buildEnv['TARGET_ISA'] == 'arm':
174 drive_sys = makeArmSystem(drive_mem_mode, options.machine_type,
175 DriveMemClass, bm[1])
176
137
138if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass):
139 test_sys.vm = KvmVM()
140
141if options.caches or options.l2cache:
142 # By default the IOCache runs at the system clock
143 test_sys.iocache = IOCache(addr_ranges = test_sys.mem_ranges)
144 test_sys.iocache.cpu_side = test_sys.iobus.master

--- 27 unchanged lines hidden (view full) ---

172 elif buildEnv['TARGET_ISA'] == 'sparc':
173 drive_sys = makeSparcSystem(drive_mem_mode, DriveMemClass, bm[1])
174 elif buildEnv['TARGET_ISA'] == 'x86':
175 drive_sys = makeX86System(drive_mem_mode, DriveMemClass, np, bm[1])
176 elif buildEnv['TARGET_ISA'] == 'arm':
177 drive_sys = makeArmSystem(drive_mem_mode, options.machine_type,
178 DriveMemClass, bm[1])
179
177 drive_sys.clock = options.sys_clock
180 # Create a source clock for the system and set the clock period
181 drive_sys.clk_domain = SrcClockDomain(clock = options.sys_clock)
178
182
179 drive_sys.cpu = DriveCPUClass(cpu_id=0)
183 # Create a source clock for the CPUs and set the clock period
184 drive_sys.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock)
185
186 drive_sys.cpu = DriveCPUClass(clk_domain=drive_sys.cpu_clk_domain,
187 cpu_id=0)
180 drive_sys.cpu.createThreads()
181 drive_sys.cpu.createInterruptController()
182 drive_sys.cpu.connectAllPorts(drive_sys.membus)
183 if options.fastmem:
184 drive_sys.cpu.fastmem = True
185 if options.kernel is not None:
186 drive_sys.kernel = binary(options.kernel)
187

--- 24 unchanged lines hidden --- 		188 drive_sys.cpu.createThreads()
189 drive_sys.cpu.createInterruptController()
190 drive_sys.cpu.connectAllPorts(drive_sys.membus)
191 if options.fastmem:
192 drive_sys.cpu.fastmem = True
193 if options.kernel is not None:
194 drive_sys.kernel = binary(options.kernel)
195

--- 24 unchanged lines hidden ---