fs.py (3481:14362d3b0756) | fs.py (3514:b166ee5dce91) |
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1# Copyright (c) 2006 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 81 unchanged lines hidden (view full) --- 90 bm = [SysConfig(), SysConfig()] 91 else: 92 bm = [SysConfig()] 93 94test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 95np = options.num_cpus 96test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 97for i in xrange(np): | 1# Copyright (c) 2006 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 81 unchanged lines hidden (view full) --- 90 bm = [SysConfig(), SysConfig()] 91 else: 92 bm = [SysConfig()] 93 94test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 95np = options.num_cpus 96test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 97for i in xrange(np): |
98 if options.caches and not options.standard_switch and not FutureClass: | 98 if options.caches: |
99 test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 100 L1Cache(size = '64kB')) 101 test_sys.cpu[i].connectMemPorts(test_sys.membus) 102 103if len(bm) == 2: 104 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 105 drive_sys.cpu = DriveCPUClass(cpu_id=0) 106 drive_sys.cpu.connectMemPorts(drive_sys.membus) 107 root = makeDualRoot(test_sys, drive_sys, options.etherdump) 108elif len(bm) == 1: 109 root = Root(clock = '1THz', system = test_sys) 110else: 111 print "Error I don't know how to create more than 2 systems." 112 sys.exit(1) 113 114Simulation.run(options, root, test_sys, FutureClass) | 99 test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 100 L1Cache(size = '64kB')) 101 test_sys.cpu[i].connectMemPorts(test_sys.membus) 102 103if len(bm) == 2: 104 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 105 drive_sys.cpu = DriveCPUClass(cpu_id=0) 106 drive_sys.cpu.connectMemPorts(drive_sys.membus) 107 root = makeDualRoot(test_sys, drive_sys, options.etherdump) 108elif len(bm) == 1: 109 root = Root(clock = '1THz', system = test_sys) 110else: 111 print "Error I don't know how to create more than 2 systems." 112 sys.exit(1) 113 114Simulation.run(options, root, test_sys, FutureClass) |