fs.py (12079:a5cc6df83fcf) fs.py (12395:322bb93e5f06)
1# Copyright (c) 2010-2013, 2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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42# Brad Beckmann
43
44import optparse
45import sys
46
47import m5
48from m5.defines import buildEnv
49from m5.objects import *
1# Copyright (c) 2010-2013, 2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 33 unchanged lines hidden (view full) ---

42# Brad Beckmann
43
44import optparse
45import sys
46
47import m5
48from m5.defines import buildEnv
49from m5.objects import *
50from m5.util import addToPath, fatal
50from m5.util import addToPath, fatal, warn
51
52addToPath('../')
53
54from ruby import Ruby
55
56from common.FSConfig import *
57from common.SysPaths import *
58from common.Benchmarks import *

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142 # For now, assign all the CPUs to the same clock domain
143 test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i)
144 for i in xrange(np)]
145
146 if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass):
147 test_sys.kvm_vm = KvmVM()
148
149 if options.ruby:
51
52addToPath('../')
53
54from ruby import Ruby
55
56from common.FSConfig import *
57from common.SysPaths import *
58from common.Benchmarks import *

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142 # For now, assign all the CPUs to the same clock domain
143 test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i)
144 for i in xrange(np)]
145
146 if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass):
147 test_sys.kvm_vm = KvmVM()
148
149 if options.ruby:
150 # Check for timing mode because ruby does not support atomic accesses
151 if not (options.cpu_type == "DerivO3CPU" or
152 options.cpu_type == "TimingSimpleCPU"):
153 print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!"
154 sys.exit(1)
155
156 Ruby.create_system(options, True, test_sys, test_sys.iobus,
157 test_sys._dma_ports)
158
159 # Create a seperate clock domain for Ruby
160 test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
161 voltage_domain = test_sys.voltage_domain)
162
163 # Connect the ruby io port to the PIO bus,

--- 209 unchanged lines hidden --- 		150 Ruby.create_system(options, True, test_sys, test_sys.iobus,
151 test_sys._dma_ports)
152
153 # Create a seperate clock domain for Ruby
154 test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
155 voltage_domain = test_sys.voltage_domain)
156
157 # Connect the ruby io port to the PIO bus,

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