| fs.py (11839:dd6df2e47c14) | fs.py (12014:f973caaf935d) |
|---|---|
| 1# Copyright (c) 2010-2013, 2016 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 133 unchanged lines hidden (view full) --- 142 test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i) 143 for i in xrange(np)] 144 145 if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass): 146 test_sys.kvm_vm = KvmVM() 147 148 if options.ruby: 149 # Check for timing mode because ruby does not support atomic accesses | 1# Copyright (c) 2010-2013, 2016 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 133 unchanged lines hidden (view full) --- 142 test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i) 143 for i in xrange(np)] 144 145 if is_kvm_cpu(TestCPUClass) or is_kvm_cpu(FutureClass): 146 test_sys.kvm_vm = KvmVM() 147 148 if options.ruby: 149 # Check for timing mode because ruby does not support atomic accesses |
| 150 if not (options.cpu_type == "detailed" or options.cpu_type == "timing"): | 150 if not (options.cpu_type == "DerivO3CPU" or 151 options.cpu_type == "TimingSimpleCPU"): |
| 151 print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!" 152 sys.exit(1) 153 154 Ruby.create_system(options, True, test_sys, test_sys.iobus, 155 test_sys._dma_ports) 156 157 # Create a seperate clock domain for Ruby 158 test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, --- 212 unchanged lines hidden --- | 152 print >> sys.stderr, "Ruby requires TimingSimpleCPU or O3CPU!!" 153 sys.exit(1) 154 155 Ruby.create_system(options, True, test_sys, test_sys.iobus, 156 test_sys._dma_ports) 157 158 # Create a seperate clock domain for Ruby 159 test_sys.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, --- 212 unchanged lines hidden --- |