1# Copyright (c) 2010-2011 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2006-2007 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Ali Saidi 40 41import optparse
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42import os
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42import sys 43 44import m5 45from m5.defines import buildEnv 46from m5.objects import * 47from m5.util import addToPath, fatal 48 49addToPath('../common') 50 51from FSConfig import * 52from SysPaths import * 53from Benchmarks import * 54import Simulation 55import CacheConfig 56from Caches import *
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57import Options |
58
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59# Get paths we might need. It's expected this file is in m5/configs/example.
60config_path = os.path.dirname(os.path.abspath(__file__))
61config_root = os.path.dirname(config_path)
62
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59parser = optparse.OptionParser()
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60Options.addCommonOptions(parser) 61Options.addFSOptions(parser) |
62
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65# Simulation options
66parser.add_option("--timesync", action="store_true",
67 help="Prevent simulated time from getting ahead of real time")
68
69# System options
70parser.add_option("--kernel", action="store", type="string")
71parser.add_option("--script", action="store", type="string")
72parser.add_option("--frame-capture", action="store_true",
73 help="Stores changed frame buffers from the VNC server to compressed "\
74 "files in the gem5 output directory")
75
76if buildEnv['TARGET_ISA'] == "arm":
77 parser.add_option("--bare-metal", action="store_true",
78 help="Provide the raw system without the linux specific bits")
79 parser.add_option("--machine-type", action="store", type="choice",
80 choices=ArmMachineType.map.keys(), default="RealView_PBX")
81# Benchmark options
82parser.add_option("--dual", action="store_true",
83 help="Simulate two systems attached with an ethernet link")
84parser.add_option("-b", "--benchmark", action="store", type="string",
85 dest="benchmark",
86 help="Specify the benchmark to run. Available benchmarks: %s"\
87 % DefinedBenchmarks)
88
89# Metafile options
90parser.add_option("--etherdump", action="store", type="string", dest="etherdump",
91 help="Specify the filename to dump a pcap capture of the" \
92 "ethernet traffic")
93
94execfile(os.path.join(config_root, "common", "Options.py"))
95
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63(options, args) = parser.parse_args() 64 65if args: 66 print "Error: script doesn't take any positional arguments" 67 sys.exit(1) 68 69# driver system CPU is always simple... note this is an assignment of 70# a class, not an instance. 71DriveCPUClass = AtomicSimpleCPU 72drive_mem_mode = 'atomic' 73 74# system under test can be any CPU 75(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 76 77TestCPUClass.clock = '2GHz' 78DriveCPUClass.clock = '2GHz' 79 80if options.benchmark: 81 try: 82 bm = Benchmarks[options.benchmark] 83 except KeyError: 84 print "Error benchmark %s has not been defined." % options.benchmark 85 print "Valid benchmarks are: %s" % DefinedBenchmarks 86 sys.exit(1) 87else: 88 if options.dual: 89 bm = [SysConfig(), SysConfig()] 90 else: 91 bm = [SysConfig()] 92 93np = options.num_cpus 94 95if buildEnv['TARGET_ISA'] == "alpha": 96 test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0]) 97elif buildEnv['TARGET_ISA'] == "mips": 98 test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0]) 99elif buildEnv['TARGET_ISA'] == "sparc": 100 test_sys = makeSparcSystem(test_mem_mode, bm[0]) 101elif buildEnv['TARGET_ISA'] == "x86": 102 test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0]) 103 Simulation.setWorkCountOptions(test_sys, options) 104elif buildEnv['TARGET_ISA'] == "arm": 105 test_sys = makeArmSystem(test_mem_mode, 106 options.machine_type, bm[0], 107 bare_metal=options.bare_metal) 108 Simulation.setWorkCountOptions(test_sys, options) 109else: 110 fatal("incapable of building non-alpha or non-sparc full system!") 111 112if options.kernel is not None: 113 test_sys.kernel = binary(options.kernel) 114 115if options.script is not None: 116 test_sys.readfile = options.script 117 118test_sys.init_param = options.init_param 119 120test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)] 121 122if bm[0]: 123 mem_size = bm[0].mem() 124else: 125 mem_size = SysConfig().mem() 126if options.caches or options.l2cache: 127 test_sys.iocache = IOCache(addr_ranges=[test_sys.physmem.range]) 128 test_sys.iocache.cpu_side = test_sys.iobus.master 129 test_sys.iocache.mem_side = test_sys.membus.slave 130else: 131 test_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns', 132 ranges = [test_sys.physmem.range]) 133 test_sys.iobridge.slave = test_sys.iobus.master 134 test_sys.iobridge.master = test_sys.membus.slave 135 136for i in xrange(np): 137 if options.fastmem: 138 test_sys.cpu[i].physmem_port = test_sys.physmem.port 139 if options.checker: 140 test_sys.cpu[i].addCheckerCpu() 141 142CacheConfig.config_cache(options, test_sys) 143 144if buildEnv['TARGET_ISA'] == 'mips': 145 setMipsOptions(TestCPUClass) 146 147if len(bm) == 2: 148 if buildEnv['TARGET_ISA'] == 'alpha': 149 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 150 elif buildEnv['TARGET_ISA'] == 'mips': 151 drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1]) 152 elif buildEnv['TARGET_ISA'] == 'sparc': 153 drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 154 elif buildEnv['TARGET_ISA'] == 'x86': 155 drive_sys = makeX86System(drive_mem_mode, np, bm[1]) 156 elif buildEnv['TARGET_ISA'] == 'arm': 157 drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1]) 158 159 drive_sys.cpu = DriveCPUClass(cpu_id=0) 160 drive_sys.cpu.createInterruptController() 161 drive_sys.cpu.connectAllPorts(drive_sys.membus) 162 if options.fastmem: 163 drive_sys.cpu.physmem_port = drive_sys.physmem.port 164 if options.kernel is not None: 165 drive_sys.kernel = binary(options.kernel) 166 drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns', 167 ranges = [drive_sys.physmem.range]) 168 drive_sys.iobridge.slave = drive_sys.iobus.master 169 drive_sys.iobridge.master = drive_sys.membus.slave 170 171 drive_sys.init_param = options.init_param 172 root = makeDualRoot(True, test_sys, drive_sys, options.etherdump) 173elif len(bm) == 1: 174 root = Root(full_system=True, system=test_sys) 175else: 176 print "Error I don't know how to create more than 2 systems." 177 sys.exit(1) 178 179if options.timesync: 180 root.time_sync_enable = True 181 182if options.frame_capture: 183 VncServer.frame_capture = True 184 185Simulation.run(options, root, test_sys, FutureClass)
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