1# Copyright (c) 2010-2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 100 unchanged lines hidden (view full) --- 109elif buildEnv['TARGET_ISA'] == "sparc": 110 test_sys = makeSparcSystem(test_mem_mode, bm[0]) 111elif buildEnv['TARGET_ISA'] == "x86": 112 test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0]) 113elif buildEnv['TARGET_ISA'] == "arm": 114 test_sys = makeArmSystem(test_mem_mode, options.machine_type, bm[0], 115 options.dtb_filename, 116 bare_metal=options.bare_metal) |
117 if options.enable_context_switch_stats_dump: 118 test_sys.enable_context_switch_stats_dump = True |
119else: 120 fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA']) 121 122# Create a top-level voltage domain 123test_sys.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 124 125# Create a source clock for the system and set the clock period 126test_sys.clk_domain = SrcClockDomain(clock = options.sys_clock, --- 119 unchanged lines hidden --- |