1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 118 unchanged lines hidden (view full) --- 127 cpu_side_filter_ranges=[AddrRange(0x8000000000, Addr.max)]) 128 test_sys.iocache.cpu_side = test_sys.iobus.port 129 test_sys.iocache.mem_side = test_sys.membus.port 130 if options.l2cache: 131 test_sys.cpu[i].connectMemPorts(test_sys.tol2bus) 132 else: 133 test_sys.cpu[i].connectMemPorts(test_sys.membus) 134 |
135 if options.fastmem: 136 test_sys.cpu[i].physmem_port = test_sys.physmem.port 137 |
138if len(bm) == 2: 139 if m5.build_env['TARGET_ISA'] == 'alpha': 140 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1]) 141 elif m5.build_env['TARGET_ISA'] == 'sparc': 142 drive_sys = makeSparcSystem(drive_mem_mode, bm[1]) 143 drive_sys.cpu = DriveCPUClass(cpu_id=0) 144 drive_sys.cpu.connectMemPorts(drive_sys.membus) |
145 if options.fastmem: 146 drive_sys.cpu.physmem_port = drive_sys.physmem.port |
147 if options.kernel is not None: 148 drive_sys.kernel = binary(options.kernel) 149 150 root = makeDualRoot(test_sys, drive_sys, options.etherdump) 151elif len(bm) == 1: 152 root = Root(system=test_sys) 153else: 154 print "Error I don't know how to create more than 2 systems." 155 sys.exit(1) 156 157Simulation.run(options, root, test_sys, FutureClass) |