1# Copyright (c) 2010-2013 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 57 unchanged lines hidden (view full) --- 66 67# Check if KVM support has been enabled, we might need to do VM 68# configuration if that's the case. 69have_kvm_support = 'BaseKvmCPU' in globals() 70def is_kvm_cpu(cpu_class): 71 return have_kvm_support and cpu_class != None and \ 72 issubclass(cpu_class, BaseKvmCPU) 73 |
74def cmd_line_template(): 75 if options.command_line and options.command_line_file: 76 print "Error: --command-line and --command-line-file are " \ 77 "mutually exclusive" 78 sys.exit(1) 79 if options.command_line: 80 return options.command_line 81 if options.command_line_file: 82 return open(options.command_line_file).read().strip() 83 return None 84 |
85def build_test_system(np): |
86 cmdline = cmd_line_template() |
87 if buildEnv['TARGET_ISA'] == "alpha": |
88 test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0], options.ruby, 89 cmdline=cmdline) |
90 elif buildEnv['TARGET_ISA'] == "mips": |
91 test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0], cmdline=cmdline) |
92 elif buildEnv['TARGET_ISA'] == "sparc": |
93 test_sys = makeSparcSystem(test_mem_mode, bm[0], cmdline=cmdline) |
94 elif buildEnv['TARGET_ISA'] == "x86": 95 test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0], |
96 options.ruby, cmdline=cmdline) |
97 elif buildEnv['TARGET_ISA'] == "arm": 98 test_sys = makeArmSystem(test_mem_mode, options.machine_type, 99 options.num_cpus, bm[0], options.dtb_filename, |
100 bare_metal=options.bare_metal, 101 cmdline=cmdline) |
102 if options.enable_context_switch_stats_dump: 103 test_sys.enable_context_switch_stats_dump = True 104 else: 105 fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA']) 106 107 # Set the cache line size for the entire system 108 test_sys.cache_line_size = options.cacheline_size 109 --- 101 unchanged lines hidden (view full) --- 211 212def build_drive_system(np): 213 # driver system CPU is always simple, so is the memory 214 # Note this is an assignment of a class, not an instance. 215 DriveCPUClass = AtomicSimpleCPU 216 drive_mem_mode = 'atomic' 217 DriveMemClass = SimpleMemory 218 |
219 cmdline = cmd_line_template() |
220 if buildEnv['TARGET_ISA'] == 'alpha': |
221 drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1], cmdline=cmdline) |
222 elif buildEnv['TARGET_ISA'] == 'mips': |
223 drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1], cmdline=cmdline) |
224 elif buildEnv['TARGET_ISA'] == 'sparc': |
225 drive_sys = makeSparcSystem(drive_mem_mode, bm[1], cmdline=cmdline) |
226 elif buildEnv['TARGET_ISA'] == 'x86': |
227 drive_sys = makeLinuxX86System(drive_mem_mode, np, bm[1], 228 cmdline=cmdline) |
229 elif buildEnv['TARGET_ISA'] == 'arm': |
230 drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1], 231 cmdline=cmdline) |
232 233 # Create a top-level voltage domain 234 drive_sys.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 235 236 # Create a source clock for the system and set the clock period 237 drive_sys.clk_domain = SrcClockDomain(clock = options.sys_clock, 238 voltage_domain = drive_sys.voltage_domain) 239 --- 92 unchanged lines hidden --- |