1# Copyright (c) 2016-2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabor Dozsa
37# Andreas Sandberg
38
39# This is an example configuration script for full system simulation of
40# a generic ARM bigLITTLE system.
41
42
43from __future__ import print_function
44
45import argparse
46import os
47import sys
48import m5
49import m5.util
50from m5.objects import *
51
52m5.util.addToPath("../../")
53
54from common import SysPaths
55from common import CpuConfig
56from common.cores.arm import ex5_big, ex5_LITTLE
57
58import devices
59from devices import AtomicCluster, KvmCluster
60
61
62default_kernel = 'vmlinux4.3.aarch64'
63default_disk = 'aarch64-ubuntu-trusty-headless.img'
64default_rcs = 'bootscript.rcS'
65
66default_mem_size= "2GB"
67
68def _to_ticks(value):
69 """Helper function to convert a latency from string format to Ticks"""
70
71 return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
72
73def _using_pdes(root):
74 """Determine if the simulator is using multiple parallel event queues"""
75
76 for obj in root.descendants():
77 if not m5.proxy.isproxy(obj.eventq_index) and \
78 obj.eventq_index != root.eventq_index:
79 return True
80
81 return False
82
83
84class BigCluster(devices.CpuCluster):
85 def __init__(self, system, num_cpus, cpu_clock,
86 cpu_voltage="1.0V"):
87 cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D,
88 devices.WalkCache, devices.L2 ]
89 super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
90 cpu_voltage, *cpu_config)
91
92class LittleCluster(devices.CpuCluster):
93 def __init__(self, system, num_cpus, cpu_clock,
94 cpu_voltage="1.0V"):
95 cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D,
96 devices.WalkCache, devices.L2 ]
97 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
98 cpu_voltage, *cpu_config)
99
100class Ex5BigCluster(devices.CpuCluster):
101 def __init__(self, system, num_cpus, cpu_clock,
102 cpu_voltage="1.0V"):
103 cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D,
104 ex5_big.WalkCache, ex5_big.L2 ]
105 super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock,
106 cpu_voltage, *cpu_config)
107
108class Ex5LittleCluster(devices.CpuCluster):
109 def __init__(self, system, num_cpus, cpu_clock,
110 cpu_voltage="1.0V"):
111 cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I,
112 ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ]
113 super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock,
114 cpu_voltage, *cpu_config)
115
116def createSystem(caches, kernel, bootscript, disks=[]):
117 sys = devices.SimpleSystem(caches, default_mem_size,
118 kernel=SysPaths.binary(kernel),
119 readfile=bootscript)
120
121 sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master)
122 for r in sys.mem_ranges ]
123
124 sys.connect()
125
126 # Attach disk images
127 if disks:
128 def cow_disk(image_file):
129 image = CowDiskImage()
130 image.child.image_file = SysPaths.disk(image_file)
131 return image
132
133 sys.disk_images = [ cow_disk(f) for f in disks ]
134 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
135 for img in sys.disk_images ]
136 for dev in sys.pci_vio_block:
137 sys.attach_pci(dev)
138
139 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
140
141 return sys
142
143cpu_types = {
144 "atomic" : (AtomicCluster, AtomicCluster),
145 "timing" : (BigCluster, LittleCluster),
146 "exynos" : (Ex5BigCluster, Ex5LittleCluster),
147}
148
149# Only add the KVM CPU if it has been compiled into gem5
150if devices.have_kvm:
151 cpu_types["kvm"] = (KvmCluster, KvmCluster)
152
153
154def addOptions(parser):
155 parser.add_argument("--restore-from", type=str, default=None,
156 help="Restore from checkpoint")
157 parser.add_argument("--dtb", type=str, default=None,
158 help="DTB file to load")
159 parser.add_argument("--kernel", type=str, default=default_kernel,
160 help="Linux kernel")
161 parser.add_argument("--disk", action="append", type=str, default=[],
162 help="Disks to instantiate")
163 parser.add_argument("--bootscript", type=str, default=default_rcs,
164 help="Linux bootscript")
165 parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(),
166 default="timing",
167 help="CPU simulation mode. Default: %(default)s")
168 parser.add_argument("--kernel-init", type=str, default="/sbin/init",
169 help="Override init")
170 parser.add_argument("--big-cpus", type=int, default=1,
171 help="Number of big CPUs to instantiate")
172 parser.add_argument("--little-cpus", type=int, default=1,
173 help="Number of little CPUs to instantiate")
174 parser.add_argument("--caches", action="store_true", default=False,
175 help="Instantiate caches")
176 parser.add_argument("--last-cache-level", type=int, default=2,
177 help="Last level of caches (e.g. 3 for L3)")
178 parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
179 help="Big CPU clock frequency")
180 parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
181 help="Little CPU clock frequency")
182 parser.add_argument("--sim-quantum", type=str, default="1ms",
183 help="Simulation quantum for parallel simulation. " \
184 "Default: %(default)s")
| 1# Copyright (c) 2016-2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabor Dozsa
37# Andreas Sandberg
38
39# This is an example configuration script for full system simulation of
40# a generic ARM bigLITTLE system.
41
42
43from __future__ import print_function
44
45import argparse
46import os
47import sys
48import m5
49import m5.util
50from m5.objects import *
51
52m5.util.addToPath("../../")
53
54from common import SysPaths
55from common import CpuConfig
56from common.cores.arm import ex5_big, ex5_LITTLE
57
58import devices
59from devices import AtomicCluster, KvmCluster
60
61
62default_kernel = 'vmlinux4.3.aarch64'
63default_disk = 'aarch64-ubuntu-trusty-headless.img'
64default_rcs = 'bootscript.rcS'
65
66default_mem_size= "2GB"
67
68def _to_ticks(value):
69 """Helper function to convert a latency from string format to Ticks"""
70
71 return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
72
73def _using_pdes(root):
74 """Determine if the simulator is using multiple parallel event queues"""
75
76 for obj in root.descendants():
77 if not m5.proxy.isproxy(obj.eventq_index) and \
78 obj.eventq_index != root.eventq_index:
79 return True
80
81 return False
82
83
84class BigCluster(devices.CpuCluster):
85 def __init__(self, system, num_cpus, cpu_clock,
86 cpu_voltage="1.0V"):
87 cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D,
88 devices.WalkCache, devices.L2 ]
89 super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
90 cpu_voltage, *cpu_config)
91
92class LittleCluster(devices.CpuCluster):
93 def __init__(self, system, num_cpus, cpu_clock,
94 cpu_voltage="1.0V"):
95 cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D,
96 devices.WalkCache, devices.L2 ]
97 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
98 cpu_voltage, *cpu_config)
99
100class Ex5BigCluster(devices.CpuCluster):
101 def __init__(self, system, num_cpus, cpu_clock,
102 cpu_voltage="1.0V"):
103 cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D,
104 ex5_big.WalkCache, ex5_big.L2 ]
105 super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock,
106 cpu_voltage, *cpu_config)
107
108class Ex5LittleCluster(devices.CpuCluster):
109 def __init__(self, system, num_cpus, cpu_clock,
110 cpu_voltage="1.0V"):
111 cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I,
112 ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ]
113 super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock,
114 cpu_voltage, *cpu_config)
115
116def createSystem(caches, kernel, bootscript, disks=[]):
117 sys = devices.SimpleSystem(caches, default_mem_size,
118 kernel=SysPaths.binary(kernel),
119 readfile=bootscript)
120
121 sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master)
122 for r in sys.mem_ranges ]
123
124 sys.connect()
125
126 # Attach disk images
127 if disks:
128 def cow_disk(image_file):
129 image = CowDiskImage()
130 image.child.image_file = SysPaths.disk(image_file)
131 return image
132
133 sys.disk_images = [ cow_disk(f) for f in disks ]
134 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
135 for img in sys.disk_images ]
136 for dev in sys.pci_vio_block:
137 sys.attach_pci(dev)
138
139 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
140
141 return sys
142
143cpu_types = {
144 "atomic" : (AtomicCluster, AtomicCluster),
145 "timing" : (BigCluster, LittleCluster),
146 "exynos" : (Ex5BigCluster, Ex5LittleCluster),
147}
148
149# Only add the KVM CPU if it has been compiled into gem5
150if devices.have_kvm:
151 cpu_types["kvm"] = (KvmCluster, KvmCluster)
152
153
154def addOptions(parser):
155 parser.add_argument("--restore-from", type=str, default=None,
156 help="Restore from checkpoint")
157 parser.add_argument("--dtb", type=str, default=None,
158 help="DTB file to load")
159 parser.add_argument("--kernel", type=str, default=default_kernel,
160 help="Linux kernel")
161 parser.add_argument("--disk", action="append", type=str, default=[],
162 help="Disks to instantiate")
163 parser.add_argument("--bootscript", type=str, default=default_rcs,
164 help="Linux bootscript")
165 parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(),
166 default="timing",
167 help="CPU simulation mode. Default: %(default)s")
168 parser.add_argument("--kernel-init", type=str, default="/sbin/init",
169 help="Override init")
170 parser.add_argument("--big-cpus", type=int, default=1,
171 help="Number of big CPUs to instantiate")
172 parser.add_argument("--little-cpus", type=int, default=1,
173 help="Number of little CPUs to instantiate")
174 parser.add_argument("--caches", action="store_true", default=False,
175 help="Instantiate caches")
176 parser.add_argument("--last-cache-level", type=int, default=2,
177 help="Last level of caches (e.g. 3 for L3)")
178 parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
179 help="Big CPU clock frequency")
180 parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
181 help="Little CPU clock frequency")
182 parser.add_argument("--sim-quantum", type=str, default="1ms",
183 help="Simulation quantum for parallel simulation. " \
184 "Default: %(default)s")
|
185 return parser
186
187def build(options):
188 m5.ticks.fixGlobalFrequency()
189
190 kernel_cmd = [
191 "earlyprintk=pl011,0x1c090000",
192 "console=ttyAMA0",
193 "lpj=19988480",
194 "norandmaps",
195 "loglevel=8",
196 "mem=%s" % default_mem_size,
197 "root=/dev/vda1",
198 "rw",
199 "init=%s" % options.kernel_init,
200 "vmalloc=768MB",
201 ]
202
203 root = Root(full_system=True)
204
205 disks = [default_disk] if len(options.disk) == 0 else options.disk
206 system = createSystem(options.caches,
207 options.kernel,
208 options.bootscript,
209 disks=disks)
210
211 root.system = system
212 system.boot_osflags = " ".join(kernel_cmd)
213
214 if options.big_cpus + options.little_cpus == 0:
215 m5.util.panic("Empty CPU clusters")
216
217 big_model, little_model = cpu_types[options.cpu_type]
218
219 all_cpus = []
220 # big cluster
221 if options.big_cpus > 0:
222 system.bigCluster = big_model(system, options.big_cpus,
223 options.big_cpu_clock)
224 system.mem_mode = system.bigCluster.memoryMode()
225 all_cpus += system.bigCluster.cpus
226
227 # little cluster
228 if options.little_cpus > 0:
229 system.littleCluster = little_model(system, options.little_cpus,
230 options.little_cpu_clock)
231 system.mem_mode = system.littleCluster.memoryMode()
232 all_cpus += system.littleCluster.cpus
233
234 # Figure out the memory mode
235 if options.big_cpus > 0 and options.little_cpus > 0 and \
236 system.littleCluster.memoryMode() != system.littleCluster.memoryMode():
237 m5.util.panic("Memory mode missmatch among CPU clusters")
238
239
240 # create caches
241 system.addCaches(options.caches, options.last_cache_level)
242 if not options.caches:
243 if options.big_cpus > 0 and system.bigCluster.requireCaches():
244 m5.util.panic("Big CPU model requires caches")
245 if options.little_cpus > 0 and system.littleCluster.requireCaches():
246 m5.util.panic("Little CPU model requires caches")
247
248 # Create a KVM VM and do KVM-specific configuration
249 if issubclass(big_model, KvmCluster):
250 _build_kvm(system, all_cpus)
251
252 # Linux device tree
253 if options.dtb is not None:
254 system.dtb_filename = SysPaths.binary(options.dtb)
255 else:
256 def create_dtb_for_system(system, filename):
257 state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
258 rootNode = system.generateDeviceTree(state)
259
260 fdt = Fdt()
261 fdt.add_rootnode(rootNode)
262 dtb_filename = os.path.join(m5.options.outdir, filename)
263 return fdt.writeDtbFile(dtb_filename)
264
265 system.dtb_filename = create_dtb_for_system(system, 'system.dtb')
266
267 return root
268
269def _build_kvm(system, cpus):
270 system.kvm_vm = KvmVM()
271
272 # Assign KVM CPUs to their own event queues / threads. This
273 # has to be done after creating caches and other child objects
274 # since these mustn't inherit the CPU event queue.
275 if len(cpus) > 1:
276 device_eq = 0
277 first_cpu_eq = 1
278 for idx, cpu in enumerate(cpus):
279 # Child objects usually inherit the parent's event
280 # queue. Override that and use the same event queue for
281 # all devices.
282 for obj in cpu.descendants():
283 obj.eventq_index = device_eq
284 cpu.eventq_index = first_cpu_eq + idx
285
286
287
288def instantiate(options, checkpoint_dir=None):
289 # Setup the simulation quantum if we are running in PDES-mode
290 # (e.g., when using KVM)
291 root = Root.getInstance()
292 if root and _using_pdes(root):
293 m5.util.inform("Running in PDES mode with a %s simulation quantum.",
294 options.sim_quantum)
295 root.sim_quantum = _to_ticks(options.sim_quantum)
296
297 # Get and load from the chkpt or simpoint checkpoint
298 if options.restore_from:
299 if checkpoint_dir and not os.path.isabs(options.restore_from):
300 cpt = os.path.join(checkpoint_dir, options.restore_from)
301 else:
302 cpt = options.restore_from
303
304 m5.util.inform("Restoring from checkpoint %s", cpt)
305 m5.instantiate(cpt)
306 else:
307 m5.instantiate()
308
309
310def run(checkpoint_dir=m5.options.outdir):
311 # start simulation (and drop checkpoints when requested)
312 while True:
313 event = m5.simulate()
314 exit_msg = event.getCause()
315 if exit_msg == "checkpoint":
316 print("Dropping checkpoint at tick %d" % m5.curTick())
317 cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick())
318 m5.checkpoint(cpt_dir)
319 print("Checkpoint done.")
320 else:
321 print(exit_msg, " @ ", m5.curTick())
322 break
323
324 sys.exit(event.getCode())
325
326
327def main():
328 parser = argparse.ArgumentParser(
329 description="Generic ARM big.LITTLE configuration")
330 addOptions(parser)
331 options = parser.parse_args()
332 root = build(options)
| 193 return parser
194
195def build(options):
196 m5.ticks.fixGlobalFrequency()
197
198 kernel_cmd = [
199 "earlyprintk=pl011,0x1c090000",
200 "console=ttyAMA0",
201 "lpj=19988480",
202 "norandmaps",
203 "loglevel=8",
204 "mem=%s" % default_mem_size,
205 "root=/dev/vda1",
206 "rw",
207 "init=%s" % options.kernel_init,
208 "vmalloc=768MB",
209 ]
210
211 root = Root(full_system=True)
212
213 disks = [default_disk] if len(options.disk) == 0 else options.disk
214 system = createSystem(options.caches,
215 options.kernel,
216 options.bootscript,
217 disks=disks)
218
219 root.system = system
220 system.boot_osflags = " ".join(kernel_cmd)
221
222 if options.big_cpus + options.little_cpus == 0:
223 m5.util.panic("Empty CPU clusters")
224
225 big_model, little_model = cpu_types[options.cpu_type]
226
227 all_cpus = []
228 # big cluster
229 if options.big_cpus > 0:
230 system.bigCluster = big_model(system, options.big_cpus,
231 options.big_cpu_clock)
232 system.mem_mode = system.bigCluster.memoryMode()
233 all_cpus += system.bigCluster.cpus
234
235 # little cluster
236 if options.little_cpus > 0:
237 system.littleCluster = little_model(system, options.little_cpus,
238 options.little_cpu_clock)
239 system.mem_mode = system.littleCluster.memoryMode()
240 all_cpus += system.littleCluster.cpus
241
242 # Figure out the memory mode
243 if options.big_cpus > 0 and options.little_cpus > 0 and \
244 system.littleCluster.memoryMode() != system.littleCluster.memoryMode():
245 m5.util.panic("Memory mode missmatch among CPU clusters")
246
247
248 # create caches
249 system.addCaches(options.caches, options.last_cache_level)
250 if not options.caches:
251 if options.big_cpus > 0 and system.bigCluster.requireCaches():
252 m5.util.panic("Big CPU model requires caches")
253 if options.little_cpus > 0 and system.littleCluster.requireCaches():
254 m5.util.panic("Little CPU model requires caches")
255
256 # Create a KVM VM and do KVM-specific configuration
257 if issubclass(big_model, KvmCluster):
258 _build_kvm(system, all_cpus)
259
260 # Linux device tree
261 if options.dtb is not None:
262 system.dtb_filename = SysPaths.binary(options.dtb)
263 else:
264 def create_dtb_for_system(system, filename):
265 state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
266 rootNode = system.generateDeviceTree(state)
267
268 fdt = Fdt()
269 fdt.add_rootnode(rootNode)
270 dtb_filename = os.path.join(m5.options.outdir, filename)
271 return fdt.writeDtbFile(dtb_filename)
272
273 system.dtb_filename = create_dtb_for_system(system, 'system.dtb')
274
275 return root
276
277def _build_kvm(system, cpus):
278 system.kvm_vm = KvmVM()
279
280 # Assign KVM CPUs to their own event queues / threads. This
281 # has to be done after creating caches and other child objects
282 # since these mustn't inherit the CPU event queue.
283 if len(cpus) > 1:
284 device_eq = 0
285 first_cpu_eq = 1
286 for idx, cpu in enumerate(cpus):
287 # Child objects usually inherit the parent's event
288 # queue. Override that and use the same event queue for
289 # all devices.
290 for obj in cpu.descendants():
291 obj.eventq_index = device_eq
292 cpu.eventq_index = first_cpu_eq + idx
293
294
295
296def instantiate(options, checkpoint_dir=None):
297 # Setup the simulation quantum if we are running in PDES-mode
298 # (e.g., when using KVM)
299 root = Root.getInstance()
300 if root and _using_pdes(root):
301 m5.util.inform("Running in PDES mode with a %s simulation quantum.",
302 options.sim_quantum)
303 root.sim_quantum = _to_ticks(options.sim_quantum)
304
305 # Get and load from the chkpt or simpoint checkpoint
306 if options.restore_from:
307 if checkpoint_dir and not os.path.isabs(options.restore_from):
308 cpt = os.path.join(checkpoint_dir, options.restore_from)
309 else:
310 cpt = options.restore_from
311
312 m5.util.inform("Restoring from checkpoint %s", cpt)
313 m5.instantiate(cpt)
314 else:
315 m5.instantiate()
316
317
318def run(checkpoint_dir=m5.options.outdir):
319 # start simulation (and drop checkpoints when requested)
320 while True:
321 event = m5.simulate()
322 exit_msg = event.getCause()
323 if exit_msg == "checkpoint":
324 print("Dropping checkpoint at tick %d" % m5.curTick())
325 cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick())
326 m5.checkpoint(cpt_dir)
327 print("Checkpoint done.")
328 else:
329 print(exit_msg, " @ ", m5.curTick())
330 break
331
332 sys.exit(event.getCode())
333
334
335def main():
336 parser = argparse.ArgumentParser(
337 description="Generic ARM big.LITTLE configuration")
338 addOptions(parser)
339 options = parser.parse_args()
340 root = build(options)
|