fs_bigLITTLE.py (11682:612f75cf36a0) fs_bigLITTLE.py (11756:0d38e56356c7)
1# Copyright (c) 2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabor Dozsa
37# Andreas Sandberg
38
39# This is an example configuration script for full system simulation of
40# a generic ARM bigLITTLE system.
41
42
43import argparse
44import os
45import sys
46import m5
47from m5.objects import *
48
49m5.util.addToPath("../../")
50
51from common import SysPaths
52from common import CpuConfig
53
54import devices
55
56
57default_dtb = 'armv8_gem5_v1_big_little_2_2.dtb'
58default_kernel = 'vmlinux4.3.aarch64'
59default_disk = 'aarch64-ubuntu-trusty-headless.img'
60default_rcs = 'bootscript.rcS'
61
62default_mem_size= "2GB"
63
64
65class BigCluster(devices.CpuCluster):
66 def __init__(self, system, num_cpus, cpu_clock,
67 cpu_voltage="1.0V"):
68 cpu_config = [ CpuConfig.get("arm_detailed"), devices.L1I, devices.L1D,
69 devices.WalkCache, devices.L2 ]
70 super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
71 cpu_voltage, *cpu_config)
72
73class LittleCluster(devices.CpuCluster):
74 def __init__(self, system, num_cpus, cpu_clock,
75 cpu_voltage="1.0V"):
76 cpu_config = [ CpuConfig.get("minor"), devices.L1I, devices.L1D,
77 devices.WalkCache, devices.L2 ]
78 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
79 cpu_voltage, *cpu_config)
80
81
1# Copyright (c) 2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabor Dozsa
37# Andreas Sandberg
38
39# This is an example configuration script for full system simulation of
40# a generic ARM bigLITTLE system.
41
42
43import argparse
44import os
45import sys
46import m5
47from m5.objects import *
48
49m5.util.addToPath("../../")
50
51from common import SysPaths
52from common import CpuConfig
53
54import devices
55
56
57default_dtb = 'armv8_gem5_v1_big_little_2_2.dtb'
58default_kernel = 'vmlinux4.3.aarch64'
59default_disk = 'aarch64-ubuntu-trusty-headless.img'
60default_rcs = 'bootscript.rcS'
61
62default_mem_size= "2GB"
63
64
65class BigCluster(devices.CpuCluster):
66 def __init__(self, system, num_cpus, cpu_clock,
67 cpu_voltage="1.0V"):
68 cpu_config = [ CpuConfig.get("arm_detailed"), devices.L1I, devices.L1D,
69 devices.WalkCache, devices.L2 ]
70 super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
71 cpu_voltage, *cpu_config)
72
73class LittleCluster(devices.CpuCluster):
74 def __init__(self, system, num_cpus, cpu_clock,
75 cpu_voltage="1.0V"):
76 cpu_config = [ CpuConfig.get("minor"), devices.L1I, devices.L1D,
77 devices.WalkCache, devices.L2 ]
78 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
79 cpu_voltage, *cpu_config)
80
81
82def createSystem(kernel, bootscript, disks=[]):
83 sys = devices.SimpleSystem(kernel=SysPaths.binary(kernel),
82def createSystem(caches, kernel, bootscript, disks=[]):
83 sys = devices.SimpleSystem(caches, default_mem_size,
84 kernel=SysPaths.binary(kernel),
84 readfile=bootscript,
85 machine_type="DTOnly")
86
85 readfile=bootscript,
86 machine_type="DTOnly")
87
87 mem_region = sys.realview._mem_regions[0]
88 sys.mem_ctrls = SimpleMemory(
89 range=AddrRange(start=mem_region[0], size=default_mem_size))
88 sys.mem_ctrls = SimpleMemory(range=sys._mem_range)
90 sys.mem_ctrls.port = sys.membus.master
91
92 sys.connect()
93
94 # Attach disk images
95 if disks:
96 def cow_disk(image_file):
97 image = CowDiskImage()
98 image.child.image_file = SysPaths.disk(image_file)
99 return image
100
101 sys.disk_images = [ cow_disk(f) for f in disks ]
102 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
103 for img in sys.disk_images ]
104 for dev in sys.pci_vio_block:
105 sys.attach_pci(dev)
106
107 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
108
109 return sys
110
111
112def main():
113 parser = argparse.ArgumentParser(
114 description="Generic ARM big.LITTLE configuration")
115
116 parser.add_argument("--restore-from", type=str, default=None,
117 help="Restore from checkpoint")
118 parser.add_argument("--dtb", type=str, default=default_dtb,
119 help="DTB file to load")
120 parser.add_argument("--kernel", type=str, default=default_kernel,
121 help="Linux kernel")
122 parser.add_argument("--disk", action="append", type=str, default=[],
123 help="Disks to instantiate")
124 parser.add_argument("--bootscript", type=str, default=default_rcs,
125 help="Linux bootscript")
126 parser.add_argument("--atomic", action="store_true", default=False,
127 help="Use atomic CPUs")
128 parser.add_argument("--kernel-init", type=str, default="/sbin/init",
129 help="Override init")
130 parser.add_argument("--big-cpus", type=int, default=1,
131 help="Number of big CPUs to instantiate")
132 parser.add_argument("--little-cpus", type=int, default=1,
133 help="Number of little CPUs to instantiate")
134 parser.add_argument("--caches", action="store_true", default=False,
135 help="Instantiate caches")
136 parser.add_argument("--last-cache-level", type=int, default=2,
137 help="Last level of caches (e.g. 3 for L3)")
138 parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
139 help="Big CPU clock frequency")
140 parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
141 help="Little CPU clock frequency")
142
143 m5.ticks.fixGlobalFrequency()
144
145 options = parser.parse_args()
146
147 kernel_cmd = [
148 "earlyprintk=pl011,0x1c090000",
149 "console=ttyAMA0",
150 "lpj=19988480",
151 "norandmaps",
152 "loglevel=8",
153 "mem=%s" % default_mem_size,
154 "root=/dev/vda1",
155 "rw",
156 "init=%s" % options.kernel_init,
157 "vmalloc=768MB",
158 ]
159
160 root = Root(full_system=True)
161
89 sys.mem_ctrls.port = sys.membus.master
90
91 sys.connect()
92
93 # Attach disk images
94 if disks:
95 def cow_disk(image_file):
96 image = CowDiskImage()
97 image.child.image_file = SysPaths.disk(image_file)
98 return image
99
100 sys.disk_images = [ cow_disk(f) for f in disks ]
101 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
102 for img in sys.disk_images ]
103 for dev in sys.pci_vio_block:
104 sys.attach_pci(dev)
105
106 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
107
108 return sys
109
110
111def main():
112 parser = argparse.ArgumentParser(
113 description="Generic ARM big.LITTLE configuration")
114
115 parser.add_argument("--restore-from", type=str, default=None,
116 help="Restore from checkpoint")
117 parser.add_argument("--dtb", type=str, default=default_dtb,
118 help="DTB file to load")
119 parser.add_argument("--kernel", type=str, default=default_kernel,
120 help="Linux kernel")
121 parser.add_argument("--disk", action="append", type=str, default=[],
122 help="Disks to instantiate")
123 parser.add_argument("--bootscript", type=str, default=default_rcs,
124 help="Linux bootscript")
125 parser.add_argument("--atomic", action="store_true", default=False,
126 help="Use atomic CPUs")
127 parser.add_argument("--kernel-init", type=str, default="/sbin/init",
128 help="Override init")
129 parser.add_argument("--big-cpus", type=int, default=1,
130 help="Number of big CPUs to instantiate")
131 parser.add_argument("--little-cpus", type=int, default=1,
132 help="Number of little CPUs to instantiate")
133 parser.add_argument("--caches", action="store_true", default=False,
134 help="Instantiate caches")
135 parser.add_argument("--last-cache-level", type=int, default=2,
136 help="Last level of caches (e.g. 3 for L3)")
137 parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
138 help="Big CPU clock frequency")
139 parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
140 help="Little CPU clock frequency")
141
142 m5.ticks.fixGlobalFrequency()
143
144 options = parser.parse_args()
145
146 kernel_cmd = [
147 "earlyprintk=pl011,0x1c090000",
148 "console=ttyAMA0",
149 "lpj=19988480",
150 "norandmaps",
151 "loglevel=8",
152 "mem=%s" % default_mem_size,
153 "root=/dev/vda1",
154 "rw",
155 "init=%s" % options.kernel_init,
156 "vmalloc=768MB",
157 ]
158
159 root = Root(full_system=True)
160
162 disks = default_disk if len(options.disk) == 0 else options.disk
163 system = createSystem(options.kernel, options.bootscript, disks=disks)
161 disks = [default_disk] if len(options.disk) == 0 else options.disk
162 system = createSystem(options.caches,
163 options.kernel,
164 options.bootscript,
165 disks=disks)
164
165 root.system = system
166 system.boot_osflags = " ".join(kernel_cmd)
167
168 AtomicCluster = devices.AtomicCluster
169
170 if options.big_cpus + options.little_cpus == 0:
171 m5.util.panic("Empty CPU clusters")
172
173 # big cluster
174 if options.big_cpus > 0:
175 if options.atomic:
176 system.bigCluster = AtomicCluster(system, options.big_cpus,
177 options.big_cpu_clock)
178 else:
179 system.bigCluster = BigCluster(system, options.big_cpus,
180 options.big_cpu_clock)
181 mem_mode = system.bigCluster.memoryMode()
182 # little cluster
183 if options.little_cpus > 0:
184 if options.atomic:
185 system.littleCluster = AtomicCluster(system, options.little_cpus,
186 options.little_cpu_clock)
187
188 else:
189 system.littleCluster = LittleCluster(system, options.little_cpus,
190 options.little_cpu_clock)
191 mem_mode = system.littleCluster.memoryMode()
192
193 if options.big_cpus > 0 and options.little_cpus > 0:
194 if system.bigCluster.memoryMode() != system.littleCluster.memoryMode():
195 m5.util.panic("Memory mode missmatch among CPU clusters")
196 system.mem_mode = mem_mode
197
198 # create caches
199 system.addCaches(options.caches, options.last_cache_level)
200 if not options.caches:
201 if options.big_cpus > 0 and system.bigCluster.requireCaches():
202 m5.util.panic("Big CPU model requires caches")
203 if options.little_cpus > 0 and system.littleCluster.requireCaches():
204 m5.util.panic("Little CPU model requires caches")
205
206 # Linux device tree
207 system.dtb_filename = SysPaths.binary(options.dtb)
208
209 # Get and load from the chkpt or simpoint checkpoint
210 if options.restore_from is not None:
211 m5.instantiate(options.restore_from)
212 else:
213 m5.instantiate()
214
215 # start simulation (and drop checkpoints when requested)
216 while True:
217 event = m5.simulate()
218 exit_msg = event.getCause()
219 if exit_msg == "checkpoint":
220 print "Dropping checkpoint at tick %d" % m5.curTick()
221 cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick())
222 m5.checkpoint(os.path.join(cpt_dir))
223 print "Checkpoint done."
224 else:
225 print exit_msg, " @ ", m5.curTick()
226 break
227
228 sys.exit(event.getCode())
229
230
231if __name__ == "__m5_main__":
232 main()
166
167 root.system = system
168 system.boot_osflags = " ".join(kernel_cmd)
169
170 AtomicCluster = devices.AtomicCluster
171
172 if options.big_cpus + options.little_cpus == 0:
173 m5.util.panic("Empty CPU clusters")
174
175 # big cluster
176 if options.big_cpus > 0:
177 if options.atomic:
178 system.bigCluster = AtomicCluster(system, options.big_cpus,
179 options.big_cpu_clock)
180 else:
181 system.bigCluster = BigCluster(system, options.big_cpus,
182 options.big_cpu_clock)
183 mem_mode = system.bigCluster.memoryMode()
184 # little cluster
185 if options.little_cpus > 0:
186 if options.atomic:
187 system.littleCluster = AtomicCluster(system, options.little_cpus,
188 options.little_cpu_clock)
189
190 else:
191 system.littleCluster = LittleCluster(system, options.little_cpus,
192 options.little_cpu_clock)
193 mem_mode = system.littleCluster.memoryMode()
194
195 if options.big_cpus > 0 and options.little_cpus > 0:
196 if system.bigCluster.memoryMode() != system.littleCluster.memoryMode():
197 m5.util.panic("Memory mode missmatch among CPU clusters")
198 system.mem_mode = mem_mode
199
200 # create caches
201 system.addCaches(options.caches, options.last_cache_level)
202 if not options.caches:
203 if options.big_cpus > 0 and system.bigCluster.requireCaches():
204 m5.util.panic("Big CPU model requires caches")
205 if options.little_cpus > 0 and system.littleCluster.requireCaches():
206 m5.util.panic("Little CPU model requires caches")
207
208 # Linux device tree
209 system.dtb_filename = SysPaths.binary(options.dtb)
210
211 # Get and load from the chkpt or simpoint checkpoint
212 if options.restore_from is not None:
213 m5.instantiate(options.restore_from)
214 else:
215 m5.instantiate()
216
217 # start simulation (and drop checkpoints when requested)
218 while True:
219 event = m5.simulate()
220 exit_msg = event.getCause()
221 if exit_msg == "checkpoint":
222 print "Dropping checkpoint at tick %d" % m5.curTick()
223 cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick())
224 m5.checkpoint(os.path.join(cpt_dir))
225 print "Checkpoint done."
226 else:
227 print exit_msg, " @ ", m5.curTick()
228 break
229
230 sys.exit(event.getCode())
231
232
233if __name__ == "__m5_main__":
234 main()