1# Copyright (c) 2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 94 unchanged lines hidden (view full) ---

103 for dev in sys.pci_vio_block:
104 sys.attach_pci(dev)
105
106 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
107
108 return sys
109
110
111def main():
112 parser = argparse.ArgumentParser(
113 description="Generic ARM big.LITTLE configuration")
114
115 parser.add_argument("--restore-from", type=str, default=None,
116 help="Restore from checkpoint")
117 parser.add_argument("--dtb", type=str, default=default_dtb,
118 help="DTB file to load")
119 parser.add_argument("--kernel", type=str, default=default_kernel,
120 help="Linux kernel")
121 parser.add_argument("--disk", action="append", type=str, default=[],
122 help="Disks to instantiate")

--- 10 unchanged lines hidden (view full) ---

133 parser.add_argument("--caches", action="store_true", default=False,
134 help="Instantiate caches")
135 parser.add_argument("--last-cache-level", type=int, default=2,
136 help="Last level of caches (e.g. 3 for L3)")
137 parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
138 help="Big CPU clock frequency")
139 parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
140 help="Little CPU clock frequency")
141
142 m5.ticks.fixGlobalFrequency()
143
144 options = parser.parse_args()
145
146 kernel_cmd = [
147 "earlyprintk=pl011,0x1c090000",
148 "console=ttyAMA0",
149 "lpj=19988480",
150 "norandmaps",
151 "loglevel=8",
152 "mem=%s" % default_mem_size,
153 "root=/dev/vda1",

--- 49 unchanged lines hidden (view full) ---

203 if options.big_cpus > 0 and system.bigCluster.requireCaches():
204 m5.util.panic("Big CPU model requires caches")
205 if options.little_cpus > 0 and system.littleCluster.requireCaches():
206 m5.util.panic("Little CPU model requires caches")
207
208 # Linux device tree
209 system.dtb_filename = SysPaths.binary(options.dtb)
210
211 # Get and load from the chkpt or simpoint checkpoint
212 if options.restore_from is not None:
213 m5.instantiate(options.restore_from)
214 else:
215 m5.instantiate()
216
217 # start simulation (and drop checkpoints when requested)
218 while True:
219 event = m5.simulate()
220 exit_msg = event.getCause()
221 if exit_msg == "checkpoint":
222 print "Dropping checkpoint at tick %d" % m5.curTick()
223 cpt_dir = os.path.join(m5.options.outdir, "cpt.%d" % m5.curTick())
224 m5.checkpoint(os.path.join(cpt_dir))
225 print "Checkpoint done."
226 else:
227 print exit_msg, " @ ", m5.curTick()
228 break
229
230 sys.exit(event.getCode())
231
232
233if __name__ == "__m5_main__":
234 main()