| devices.py (14115:2a3eee6ded38) | devices.py (14178:f68430623245) |
|---|---|
| 1# Copyright (c) 2016-2017 ARM Limited | 1# Copyright (c) 2016-2017, 2019 ARM Limited |
| 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 172 unchanged lines hidden (view full) --- 182 cpu_voltage, *cpu_config) 183 def addL1(self): 184 pass 185 186 187class SimpleSystem(LinuxArmSystem): 188 cache_line_size = 64 189 | 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 172 unchanged lines hidden (view full) --- 182 cpu_voltage, *cpu_config) 183 def addL1(self): 184 pass 185 186 187class SimpleSystem(LinuxArmSystem): 188 cache_line_size = 64 189 |
| 190 def __init__(self, caches, mem_size, **kwargs): | 190 def __init__(self, caches, mem_size, platform=None, **kwargs): |
| 191 super(SimpleSystem, self).__init__(**kwargs) 192 193 self.voltage_domain = VoltageDomain(voltage="1.0V") 194 self.clk_domain = SrcClockDomain(clock="1GHz", 195 voltage_domain=Parent.voltage_domain) 196 | 191 super(SimpleSystem, self).__init__(**kwargs) 192 193 self.voltage_domain = VoltageDomain(voltage="1.0V") 194 self.clk_domain = SrcClockDomain(clock="1GHz", 195 voltage_domain=Parent.voltage_domain) 196 |
| 197 self.realview = VExpress_GEM5_V1() | 197 if platform is None: 198 self.realview = VExpress_GEM5_V1() 199 else: 200 self.realview = platform |
| 198 199 if hasattr(self.realview.gic, 'cpu_addr'): 200 self.gic_cpu_addr = self.realview.gic.cpu_addr 201 self.flags_addr = self.realview.realview_io.pio_addr + 0x30 202 203 self.membus = MemBus() 204 205 self.intrctrl = IntrControl() --- 81 unchanged lines hidden --- | 201 202 if hasattr(self.realview.gic, 'cpu_addr'): 203 self.gic_cpu_addr = self.realview.gic.cpu_addr 204 self.flags_addr = self.realview.realview_io.pio_addr + 0x30 205 206 self.membus = MemBus() 207 208 self.intrctrl = IntrControl() --- 81 unchanged lines hidden --- |