| Caches.py (9315:2e00867b5001) | Caches.py (9321:7f0464326b2b) |
|---|---|
| 1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 46 unchanged lines hidden (view full) --- 55 tgts_per_mshr = 20 56 is_top_level = True 57 58class L2Cache(BaseCache): 59 assoc = 8 60 block_size = 64 61 hit_latency = 20 62 response_latency = 20 | 1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 46 unchanged lines hidden (view full) --- 55 tgts_per_mshr = 20 56 is_top_level = True 57 58class L2Cache(BaseCache): 59 assoc = 8 60 block_size = 64 61 hit_latency = 20 62 response_latency = 20 |
| 63 mshrs = 92 64 tgts_per_mshr = 16 | 63 mshrs = 20 64 tgts_per_mshr = 12 |
| 65 write_buffers = 8 66 67class IOCache(BaseCache): 68 assoc = 8 69 block_size = 64 70 hit_latency = 50 71 response_latency = 50 72 mshrs = 20 --- 14 unchanged lines hidden --- | 65 write_buffers = 8 66 67class IOCache(BaseCache): 68 assoc = 8 69 block_size = 64 70 hit_latency = 50 71 response_latency = 50 72 mshrs = 20 --- 14 unchanged lines hidden --- |