Caches.py (9288:3d6da8559605) Caches.py (9310:aa7bf10e822a)
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 26 unchanged lines hidden (view full) ---

35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Lisa Hsu
40
41from m5.objects import *
42
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 26 unchanged lines hidden (view full) ---

35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Lisa Hsu
40
41from m5.objects import *
42
43class L1Cache(BaseCache):
43# Base implementations of L1, L2, IO and TLB-walker caches. There are
44# used in the regressions and also as base components in the
45# system-configuration scripts. The values are meant to serve as a
46# starting point, and specific parameters can be overridden in the
47# specific instantiations.
48
49class L1(BaseCache):
44 assoc = 2
50 assoc = 2
45 block_size = 64
46 hit_latency = 2
47 response_latency = 2
51 hit_latency = 2
52 response_latency = 2
48 mshrs = 10
53 block_size = 64
54 mshrs = 4
49 tgts_per_mshr = 20
50 is_top_level = True
51
55 tgts_per_mshr = 20
56 is_top_level = True
57
52class L2Cache(BaseCache):
58class L2(BaseCache):
53 assoc = 8
54 block_size = 64
55 hit_latency = 20
56 response_latency = 20
59 assoc = 8
60 block_size = 64
61 hit_latency = 20
62 response_latency = 20
63 mshrs = 92
64 tgts_per_mshr = 16
65 write_buffers = 8
66
67class IOCache(BaseCache):
68 assoc = 8
69 block_size = 64
70 hit_latency = 50
71 response_latency = 50
57 mshrs = 20
72 mshrs = 20
73 size = '1kB'
58 tgts_per_mshr = 12
74 tgts_per_mshr = 12
75 forward_snoops = False
76 is_top_level = True
59
60class PageTableWalkerCache(BaseCache):
61 assoc = 2
62 block_size = 64
63 hit_latency = 2
64 response_latency = 2
65 mshrs = 10
66 size = '1kB'
67 tgts_per_mshr = 12
68 is_top_level = True
69
77
78class PageTableWalkerCache(BaseCache):
79 assoc = 2
80 block_size = 64
81 hit_latency = 2
82 response_latency = 2
83 mshrs = 10
84 size = '1kB'
85 tgts_per_mshr = 12
86 is_top_level = True
87
70class IOCache(BaseCache):
71 assoc = 8
72 block_size = 64
73 hit_latency = 50
74 response_latency = 50
75 mshrs = 20
76 size = '1kB'
77 tgts_per_mshr = 12
78 forward_snoops = False
79 is_top_level = True