1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 assoc = 2 51 hit_latency = 2 52 response_latency = 2 53 mshrs = 4 54 tgts_per_mshr = 20 55 56class L1_ICache(L1Cache): 57 is_read_only = True |
58 # Writeback clean lines as well 59 writeback_clean = True |
60 61class L1_DCache(L1Cache): 62 pass 63 64class L2Cache(Cache): 65 assoc = 8 66 hit_latency = 20 67 response_latency = 20 --- 18 unchanged lines hidden (view full) --- 86 size = '1kB' 87 tgts_per_mshr = 12 88 forward_snoops = False 89 # the x86 table walker actually writes to the table-walker cache 90 if buildEnv['TARGET_ISA'] == 'x86': 91 is_read_only = False 92 else: 93 is_read_only = True |
94 # Writeback clean lines as well 95 writeback_clean = True |