| CacheConfig.py (12014:f973caaf935d) | CacheConfig.py (12097:77a3d2890ba6) |
|---|---|
| 1# Copyright (c) 2012-2013, 2015-2016 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 print "External caches and internal caches are exclusive options.\n" 51 sys.exit(1) 52 53 if options.external_memory_system: 54 ExternalCache = ExternalCacheFactory(options.external_memory_system) 55 56 if options.cpu_type == "O3_ARM_v7a_3": 57 try: | 1# Copyright (c) 2012-2013, 2015-2016 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 print "External caches and internal caches are exclusive options.\n" 51 sys.exit(1) 52 53 if options.external_memory_system: 54 ExternalCache = ExternalCacheFactory(options.external_memory_system) 55 56 if options.cpu_type == "O3_ARM_v7a_3": 57 try: |
| 58 from O3_ARM_v7a import * | 58 from cores.arm.O3_ARM_v7a import * |
| 59 except: | 59 except: |
| 60 print "arm_detailed is unavailable. Did you compile the O3 model?" | 60 print "O3_ARM_v7a_3 is unavailable. Did you compile the O3 model?" |
| 61 sys.exit(1) 62 63 dcache_class, icache_class, l2_cache_class, walk_cache_class = \ 64 O3_ARM_v7a_DCache, O3_ARM_v7a_ICache, O3_ARM_v7aL2, \ 65 O3_ARM_v7aWalkCache 66 else: 67 dcache_class, icache_class, l2_cache_class, walk_cache_class = \ 68 L1_DCache, L1_ICache, L2Cache, None --- 118 unchanged lines hidden --- | 61 sys.exit(1) 62 63 dcache_class, icache_class, l2_cache_class, walk_cache_class = \ 64 O3_ARM_v7a_DCache, O3_ARM_v7a_ICache, O3_ARM_v7aL2, \ 65 O3_ARM_v7aWalkCache 66 else: 67 dcache_class, icache_class, l2_cache_class, walk_cache_class = \ 68 L1_DCache, L1_ICache, L2Cache, None --- 118 unchanged lines hidden --- |