Searched refs:interface_ip_ (Results 1 - 12 of 12) sorted by relevance

/gem5/ext/mcpat/
H A Diocontrollers.h46 NIUController(XMLNode* _xml_data, InputParameter* interface_ip_);
58 PCIeController(XMLNode* _xml_data, InputParameter* interface_ip_);
70 FlashController(XMLNode* _xml_data, InputParameter* interface_ip_);
H A Dmemoryctrl.h49 MCBackend(XMLNode* _xml_data, InputParameter* interface_ip_,
64 MCPHY(XMLNode* _xml_data, InputParameter* interface_ip_,
83 InputParameter* interface_ip_, const MCParameters & mcp_,
94 MemoryController(XMLNode* _xml_data, InputParameter* interface_ip_);
H A Dcore.h77 BranchPredictor(XMLNode* _xml_data, InputParameter* interface_ip_,
123 InstFetchU(XMLNode* _xml_data, InputParameter* interface_ip_,
151 SchedulerU(XMLNode* _xml_data, InputParameter* interface_ip_,
177 RENAMINGU(XMLNode* _xml_data, InputParameter* interface_ip_,
200 LoadStoreU(XMLNode* _xml_data, InputParameter* interface_ip_,
248 MemManU(XMLNode* _xml_data, InputParameter* interface_ip_,
273 InputParameter* interface_ip_, const CoreParameters & _core_params,
302 EXECU(XMLNode* _xml_data, InputParameter* interface_ip_,
330 Core(XMLNode* _xml_data, int _ithCore, InputParameter* interface_ip_);
H A Dbus_interconnect.h87 BusInterconnect(XMLNode* _xml_data, InputParameter* interface_ip_);
H A Dnoc.h93 InputParameter* interface_ip_);
H A Diocontrollers.cc71 NIUController::NIUController(XMLNode* _xml_data,InputParameter* interface_ip_) argument
72 : McPATComponent(_xml_data, interface_ip_) {
239 InputParameter* interface_ip_)
240 : McPATComponent(_xml_data, interface_ip_) {
402 InputParameter* interface_ip_)
403 : McPATComponent(_xml_data, interface_ip_) {
238 PCIeController(XMLNode* _xml_data, InputParameter* interface_ip_) argument
401 FlashController(XMLNode* _xml_data, InputParameter* interface_ip_) argument
H A Dbus_interconnect.cc48 InputParameter* interface_ip_)
49 : McPATComponent(_xml_data), link_bus(NULL), interface_ip(*interface_ip_) {
47 BusInterconnect(XMLNode* _xml_data, InputParameter* interface_ip_) argument
H A Dlogic.h204 FunctionalUnit(XMLNode* _xml_data, InputParameter* interface_ip_,
229 UndiffCore(XMLNode* _xml_data, InputParameter* interface_ip_,
H A Dmemoryctrl.cc74 MCBackend::MCBackend(XMLNode* _xml_data, InputParameter* interface_ip_, argument
76 : McPATComponent(_xml_data), l_ip(*interface_ip_), mcp(mcp_), mcs(mcs_) {
203 MCPHY::MCPHY(XMLNode* _xml_data, InputParameter* interface_ip_, argument
205 : McPATComponent(_xml_data), l_ip(*interface_ip_), mcp(mcp_), mcs(mcs_) {
319 MCFrontEnd::MCFrontEnd(XMLNode* _xml_data, InputParameter* interface_ip_, argument
322 writeBuffer(NULL), MC_arb(NULL), interface_ip(*interface_ip_),
482 InputParameter* interface_ip_)
483 : McPATComponent(_xml_data), interface_ip(*interface_ip_) {
481 MemoryController(XMLNode* _xml_data, InputParameter* interface_ip_) argument
H A Dnoc.cc47 InputParameter* interface_ip_)
49 interface_ip(*interface_ip_), link_bus_exist(false),
46 OnChipNetwork(XMLNode* _xml_data, int ithNoC_, InputParameter* interface_ip_) argument
H A Dcore.cc53 InstFetchU::InstFetchU(XMLNode* _xml_data, InputParameter* interface_ip_, argument
58 interface_ip(*interface_ip_),
282 InputParameter* interface_ip_,
288 interface_ip(*interface_ip_),
503 SchedulerU::SchedulerU(XMLNode* _xml_data, InputParameter* interface_ip_, argument
509 interface_ip(*interface_ip_),
795 LoadStoreU::LoadStoreU(XMLNode* _xml_data, InputParameter* interface_ip_, argument
799 interface_ip(*interface_ip_),
908 MemManU::MemManU(XMLNode* _xml_data, InputParameter* interface_ip_, argument
912 interface_ip(*interface_ip_),
281 BranchPredictor(XMLNode* _xml_data, InputParameter* interface_ip_, const CoreParameters & _core_params, const CoreStatistics & _core_stats, bool exist_) argument
1088 RegFU(XMLNode* _xml_data, InputParameter* interface_ip_, const CoreParameters & _core_params, const CoreStatistics & _core_stats, bool exist_) argument
1221 EXECU(XMLNode* _xml_data, InputParameter* interface_ip_, double lsq_height_, const CoreParameters & _core_params, const CoreStatistics & _core_stats, bool exist_) argument
1538 RENAMINGU(XMLNode* _xml_data, InputParameter* interface_ip_, const CoreParameters & _core_params, const CoreStatistics & _core_stats, bool exist_) argument
2073 Core(XMLNode* _xml_data, int _ithCore, InputParameter* interface_ip_) argument
[all...]
H A Dlogic.cc501 InputParameter* interface_ip_,
506 interface_ip(*interface_ip_), core_params(_core_params),
715 UndiffCore::UndiffCore(XMLNode* _xml_data, InputParameter* interface_ip_, argument
719 interface_ip(*interface_ip_), coredynp(dyn_p_),
500 FunctionalUnit(XMLNode* _xml_data, InputParameter* interface_ip_, const CoreParameters & _core_params, const CoreStatistics & _core_stats, enum FU_type fu_type_) argument

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