Searched refs:LSL (Results 1 - 6 of 6) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmem.cc58 if (shiftType != LSL || shiftAmt != 0) {
60 case LSL:
61 ccprintf(os, " LSL #%d", shiftAmt);
H A Dpred_inst.cc83 INTREG_ZERO, INTREG_ZERO, 0, LSL, imm);
H A Ddata64.cc50 INTREG_ZERO, INTREG_ZERO, 0, LSL, imm);
78 op2, INTREG_ZERO, shiftAmt, LSL, 0);
H A Dstatic_inst.cc66 case LSL:
101 case LSL:
185 case LSL:
225 case LSL:
268 case LSL:
512 case LSL:
519 os << "LSL";
573 case UXTX: ccprintf(os, ", LSL");
H A Dmacromem.cc508 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
646 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
900 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
1103 new MicroAddUop(machInst, rn, rn, rm, 0, ArmISA::LSL);
/gem5/src/arch/arm/
H A Dtypes.hh532 LSL = 0, enumerator in enum:ArmISA::ArmShiftType

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