Searched refs:GICH_MISR (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dvgic.hh77 static const int GICH_MISR = 0x010; member in class:VGic
H A Dgic_v3_cpu_interface.hh189 GICH_MISR = 0x0010, enumerator in enum:Gicv3CPUInterface::__anon6
H A Dvgic.cc187 case GICH_MISR:

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