Searched refs:E_BASE_ENABLE_MASK (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/dev/arm/ | ||
| H A D | smmu_v3_defs.hh | 98 E_BASE_ENABLE_MASK = 0x8000000000000000ULL, enumerator in enum:__anon14 |
| H A D | smmu_v3_transl.cc | 1320 if (!(smmu.regs.eventq_irq_cfg0 & E_BASE_ENABLE_MASK)) |
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