Searched hist:9925 (Results 1 - 3 of 3) sorted by relevance
| /gem5/src/arch/alpha/isa/ | ||
| H A D | mem.isa | 6185:9925b3e83e06 Tue May 12 15:01:00 EDT 2009 Korey Sewell <ksewell@umich.edu> inorder-mem: skeleton support for prefetch/writehints |
| /gem5/src/arch/alpha/ | ||
| H A D | tlb.cc | 6185:9925b3e83e06 Tue May 12 15:01:00 EDT 2009 Korey Sewell <ksewell@umich.edu> inorder-mem: skeleton support for prefetch/writehints |
| /gem5/src/cpu/kvm/ | ||
| H A D | base.cc | 9925:7840e90aff6c Wed Oct 16 12:12:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> kvm: Fix latency calculation of IPR accesses When handling IPR accesses in doMMIOAccess, the KVM CPU used clockEdge() to convert between cycles and ticks. This is incorrect since doMMIOAccess is supposed to return a latency in ticks rather than when the access is done. This changeset fixes this issue by returning clockPeriod() * ipr_delay instead. |
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