Searched hist:9894 (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/ | ||
| H A D | load_or_store_floating_point.py | 9894:c0a3920859bd Sun Sep 29 18:00:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for loading 32-bit and 80-bit floats in the x87 The x87 FPU supports three floating point formats: 32-bit, 64-bit, and 80-bit floats. The current gem5 implementation supports 32-bit and 64-bit floats, but only works correctly for 64-bit floats. This changeset fixes the 32-bit float handling by correctly loading and rounding (using truncation) 32-bit floats instead of simply truncating the bit pattern. 80-bit floats are loaded by first loading the 80-bits of the float to two temporary integer registers. A micro-op (cvtint_fp80) then converts the contents of the two integer registers to the internal FP representation (double). Similarly, when storing an 80-bit float, there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that convert an internal FP register to 80-bit and stores the upper 64-bits or lower 32-bits to an integer register, which is the written to memory using normal integer stores. |
| /gem5/src/arch/x86/isa/decoder/ | ||
| H A D | x87.isa | 9894:c0a3920859bd Sun Sep 29 18:00:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for loading 32-bit and 80-bit floats in the x87 The x87 FPU supports three floating point formats: 32-bit, 64-bit, and 80-bit floats. The current gem5 implementation supports 32-bit and 64-bit floats, but only works correctly for 64-bit floats. This changeset fixes the 32-bit float handling by correctly loading and rounding (using truncation) 32-bit floats instead of simply truncating the bit pattern. 80-bit floats are loaded by first loading the 80-bits of the float to two temporary integer registers. A micro-op (cvtint_fp80) then converts the contents of the two integer registers to the internal FP representation (double). Similarly, when storing an 80-bit float, there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that convert an internal FP register to 80-bit and stores the upper 64-bits or lower 32-bits to an integer register, which is the written to memory using normal integer stores. |
| /gem5/src/arch/x86/isa/microops/ | ||
| H A D | fpop.isa | 9894:c0a3920859bd Sun Sep 29 18:00:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for loading 32-bit and 80-bit floats in the x87 The x87 FPU supports three floating point formats: 32-bit, 64-bit, and 80-bit floats. The current gem5 implementation supports 32-bit and 64-bit floats, but only works correctly for 64-bit floats. This changeset fixes the 32-bit float handling by correctly loading and rounding (using truncation) 32-bit floats instead of simply truncating the bit pattern. 80-bit floats are loaded by first loading the 80-bits of the float to two temporary integer registers. A micro-op (cvtint_fp80) then converts the contents of the two integer registers to the internal FP representation (double). Similarly, when storing an 80-bit float, there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that convert an internal FP register to 80-bit and stores the upper 64-bits or lower 32-bits to an integer register, which is the written to memory using normal integer stores. |
| H A D | ldstop.isa | 9894:c0a3920859bd Sun Sep 29 18:00:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for loading 32-bit and 80-bit floats in the x87 The x87 FPU supports three floating point formats: 32-bit, 64-bit, and 80-bit floats. The current gem5 implementation supports 32-bit and 64-bit floats, but only works correctly for 64-bit floats. This changeset fixes the 32-bit float handling by correctly loading and rounding (using truncation) 32-bit floats instead of simply truncating the bit pattern. 80-bit floats are loaded by first loading the 80-bits of the float to two temporary integer registers. A micro-op (cvtint_fp80) then converts the contents of the two integer registers to the internal FP representation (double). Similarly, when storing an 80-bit float, there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that convert an internal FP register to 80-bit and stores the upper 64-bits or lower 32-bits to an integer register, which is the written to memory using normal integer stores. |
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