History log of /gem5/src/arch/x86/isa/decoder/x87.isa
Revision Date Author Comments
# 11159:9459593cb649 06-Oct-2015 Steve Reinhardt <steve.reinhardt@amd.com>

x86: implement fild, fucomi, and fucomip x87 insts

fild loads an integer value into the x87 top of stack register.
fucomi/fucomip compare two x87 register values (the latter
also doing a stack pop).
These instructions are used by some versions of GNU libstdc++.


# 10784:2f1a0f6d5d77 13-Apr-2015 Nilay Vaish <nilay@cs.wisc.edu>

x86: implements x87 mult/div instructions


# 10044:42e058cae3d0 27-Jan-2014 Nilay Vaish <nilay@cs.wisc.edu>

x86: implements x87 add/sub instructions


# 10043:301f2c0b3423 27-Jan-2014 Nilay Vaish <nilay@cs.wisc.edu>

x86: implements fxch instruction.


# 9895:a1f661af9dc9 29-Sep-2013 Andreas Sandberg <andreas@sandberg.pp.se>

x86: Add support for FLDENV & FNSTENV


# 9894:c0a3920859bd 29-Sep-2013 Andreas Sandberg <andreas@sandberg.pp.se>

x86: Add support for loading 32-bit and 80-bit floats in the x87

The x87 FPU supports three floating point formats: 32-bit, 64-bit, and
80-bit floats. The current gem5 implementation supports 32-bit and
64-bit floats, but only works correctly for 64-bit floats. This
changeset fixes the 32-bit float handling by correctly loading and
rounding (using truncation) 32-bit floats instead of simply truncating
the bit pattern.

80-bit floats are loaded by first loading the 80-bits of the float to
two temporary integer registers. A micro-op (cvtint_fp80) then
converts the contents of the two integer registers to the internal FP
representation (double). Similarly, when storing an 80-bit float,
there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that
convert an internal FP register to 80-bit and stores the upper 64-bits
or lower 32-bits to an integer register, which is the written to
memory using normal integer stores.


# 9582:0632d2d1575c 11-Mar-2013 Nilay Vaish <nilay@cs.wisc.edu>

x86: implement some of the x87 instructions
This patch implements ftan, fprem, fyl2x, fld* floating-point instructions.


# 9472:8a2175fa7fa0 15-Jan-2013 Nilay Vaish <nilay@cs.wisc.edu>

x86: implements fsin, fcos instructions


# 9470:68f7e0bcf4aa 15-Jan-2013 Nilay Vaish <nilay@cs.wisc.edu>

x86: implement fabs, fchs instructions


# 9372:7ba317c33683 30-Dec-2012 Nilay Vaish <nilay@cs.wisc.edu>

x86: implement x87 fp instruction fnstsw
This patch implements the fnstsw instruction. The code was originally written
by Vince Weaver. Gabe had made some comments about the code, but those were
never addressed. This patch addresses those comments.


# 9371:7c1484cc9b10 30-Dec-2012 Nilay Vaish <nilay@cs.wisc.edu>

x86: implement x87 fp instruction fsincos
This patch implements the fsincos instruction. The code was originally written
by Vince Weaver. Gabe had made some comments about the code, but those were
never addressed. This patch addresses those comments.


# 8106:4a194d4f6fb0 02-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

X86: Decode the mysterious and elusive ffreep x87 instruction.

The internet says this instruction was created by accident when an Intel CPU
failed to decode x87 instructions properly. It's been documented on a few rare
occasions and has generally worked to ensure backwards compatability. One
source claims that the gcc toolchain is basically the only thing that emits
it, and that emulators/binary translators like qemu and bochs implement it.

We won't actually implement it here since we're hardly implementing any other
x87 instructions either. If we were to implement it, it would behave the same
as ffree but then also pop the register stack.

http://www.pagetable.com/?p=16


# 7087:fb8d5786ff30 24-May-2010 Nathan Binkert <nate@binkert.org>

copyright: Change HP copyright on x86 code to be more friendly


# 6619:de112a8ac3d8 20-Aug-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Fix the decoding for and fill out FST and FSTP.


# 5162:5af26efb306e 19-Oct-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Make "Inst" the default format instead of WarnUnimpl for one byte opcodes.


# 5084:675cb680830f 19-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the fld, fst, and fstp instructions.


# 4827:d4ea1bbfdbc3 31-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Add operand type information to the fnstcw and fldw instruction placeholders.
These are the only floating point instructions that get used in my simple hello world test. These instructions are for setting up the floating point control register. Their not being implemented doesn't affect anything because floating point isn't used.


# 4825:93a992aa87f6 30-Jul-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Add decoding for x87 floating point.