Searched hist:6179 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/alpha/isa/ | ||
| H A D | mem.isa | 6179:83693f4b79fd Tue May 12 15:01:00 EDT 2009 Korey Sewell <ksewell@umich.edu> inorder-alpha-port: initial inorder support of ALPHA Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.) |
| /gem5/src/arch/ | ||
| H A D | SConscript | 6179:83693f4b79fd Tue May 12 15:01:00 EDT 2009 Korey Sewell <ksewell@umich.edu> inorder-alpha-port: initial inorder support of ALPHA Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.) |
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