Searched hist:14289 (Results 1 - 2 of 2) sorted by relevance
/gem5/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/ | ||
H A D | move_non_temporal.py | 14289:49005710b522 Mon Aug 26 18:59:00 EDT 2019 Pouya Fotouhi <Pouya.Fotouhi@amd.com> arch-x86: ignore non-temporal hint for movntps/movntpd SSE insts Making the implementation of movntps/movntpd consistent with other non-temporal instructions. We are ignoring the hint here, and implementing those instructions as cacheable instructions. This change adds a warning to let user know about this workaround. Also, this change add the address check for second part of move. Change-Id: I811652b24cf39ca2f5c5d4c9e9e417f69190b55c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20408 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com> |
/gem5/src/arch/x86/isa/decoder/ | ||
H A D | two_byte_opcodes.isa | 14289:49005710b522 Mon Aug 26 18:59:00 EDT 2019 Pouya Fotouhi <Pouya.Fotouhi@amd.com> arch-x86: ignore non-temporal hint for movntps/movntpd SSE insts Making the implementation of movntps/movntpd consistent with other non-temporal instructions. We are ignoring the hint here, and implementing those instructions as cacheable instructions. This change adds a warning to let user know about this workaround. Also, this change add the address check for second part of move. Change-Id: I811652b24cf39ca2f5c5d4c9e9e417f69190b55c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20408 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com> |
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