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/gem5/src/cpu/o3/
H A DFuncUnitConfig.py10806:b9410e821c41 Wed Apr 29 23:35:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> cpu: o3: single cycle default div microop latency on x86

This patch sets the default latency of the division microop to a single cycle
on x86. This is because the division instructions DIV and IDIV have been
implemented as loops of div microops, where each microop computes a single bit
of the quotient.

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