Searched refs:vapr0 (Results 1 - 1 of 1) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc1743 RegVal vapr0 = isa->readMiscRegNoEffect(MISCREG_ICH_AP0R0_EL2 + i); local
1746 if (!vapr0 && !vapr1) {
1750 int vapr0_count = ctz32(vapr0);
1754 vapr0 &= vapr0 - 1;
1755 isa->setMiscRegNoEffect(MISCREG_ICH_AP0R0_EL2 + i, vapr0);

Completed in 9 milliseconds