Searched refs:tarmCtx (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/tracers/
H A Dtarmac_record.cc119 const TarmacContext& tarmCtx,
121 : InstEntry(tarmCtx.thread, tarmCtx.pc, tarmCtx.staticInst, predicate)
123 secureMode = inSecureState(tarmCtx.thread);
126 tarmCtx.staticInst.get()
144 const TarmacContext& tarmCtx,
147 loadAccess(tarmCtx.staticInst->isLoad())
152 const TarmacContext& tarmCtx,
154 : RegEntry(tarmCtx
118 TraceInstEntry( const TarmacContext& tarmCtx, bool predicate) argument
143 TraceMemEntry( const TarmacContext& tarmCtx, uint8_t _size, Addr _addr, uint64_t _data) argument
151 TraceRegEntry( const TarmacContext& tarmCtx, const RegId& reg) argument
189 updateMisc( const TarmacContext& tarmCtx, RegIndex regRelIdx ) argument
216 updateCC( const TarmacContext& tarmCtx, RegIndex regRelIdx ) argument
229 updateFloat( const TarmacContext& tarmCtx, RegIndex regRelIdx ) argument
242 updateInt( const TarmacContext& tarmCtx, RegIndex regRelIdx ) argument
282 addInstEntry(std::vector<InstPtr>& queue, const TarmacContext& tarmCtx) argument
293 addMemEntry(std::vector<MemPtr>& queue, const TarmacContext& tarmCtx) argument
309 addRegEntry(std::vector<RegPtr>& queue, const TarmacContext& tarmCtx) argument
[all...]
H A Dtarmac_record_v8.cc49 const TarmacContext& tarmCtx,
51 : TraceInstEntry(tarmCtx, predicate),
52 TraceEntryV8(tarmCtx.tarmacCpuName()),
56 const auto thread = tarmCtx.thread;
64 const TarmacContext& tarmCtx,
66 : TraceMemEntry(tarmCtx, _size, _addr, _data),
67 TraceEntryV8(tarmCtx.tarmacCpuName()),
70 const auto thread = tarmCtx.thread;
78 const TarmacContext& tarmCtx,
80 : TraceRegEntry(tarmCtx, re
48 TraceInstEntryV8( const TarmacContext& tarmCtx, bool predicate) argument
63 TraceMemEntryV8( const TarmacContext& tarmCtx, uint8_t _size, Addr _addr, uint64_t _data) argument
77 TraceRegEntryV8( const TarmacContext& tarmCtx, const RegId& reg) argument
87 updateInt( const TarmacContext& tarmCtx, RegIndex regRelIdx ) argument
118 updateMisc( const TarmacContext& tarmCtx, RegIndex regRelIdx ) argument
129 addInstEntry(std::vector<InstPtr>& queue, const TarmacContext& tarmCtx) argument
140 addMemEntry(std::vector<MemPtr>& queue, const TarmacContext& tarmCtx) argument
156 addRegEntry(std::vector<RegPtr>& queue, const TarmacContext& tarmCtx) argument
[all...]
H A Dtarmac_record.hh97 TraceInstEntry(const TarmacContext& tarmCtx, bool predicate);
121 TraceRegEntry(const TarmacContext& tarmCtx, const RegId& reg);
132 void update(const TarmacContext& tarmCtx);
141 updateMisc(const TarmacContext& tarmCtx, RegIndex regRelIdx);
144 updateCC(const TarmacContext& tarmCtx, RegIndex regRelIdx);
147 updateFloat(const TarmacContext& tarmCtx, RegIndex regRelIdx);
150 updateInt(const TarmacContext& tarmCtx, RegIndex regRelIdx);
167 TraceMemEntry(const TarmacContext& tarmCtx,
208 genRegister(const TarmacContext& tarmCtx, const RegId& reg) argument
210 RegEntry single_reg(tarmCtx, re
218 mergeCCEntry(std::vector<RegPtr>& queue, const TarmacContext& tarmCtx) argument
[all...]
H A Dtarmac_record_v8.hh81 TraceInstEntryV8(const TarmacContext& tarmCtx, bool predicate);
98 TraceRegEntryV8(const TarmacContext& tarmCtx, const RegId& reg);
105 void updateInt(const TarmacContext& tarmCtx,
108 void updateMisc(const TarmacContext& tarmCtx,
120 TraceMemEntryV8(const TarmacContext& tarmCtx,

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