Lines Matching refs:tarmCtx
119 const TarmacContext& tarmCtx,
121 : InstEntry(tarmCtx.thread, tarmCtx.pc, tarmCtx.staticInst, predicate)
123 secureMode = inSecureState(tarmCtx.thread);
126 tarmCtx.staticInst.get()
144 const TarmacContext& tarmCtx,
147 loadAccess(tarmCtx.staticInst->isLoad())
152 const TarmacContext& tarmCtx,
154 : RegEntry(tarmCtx.pc),
163 const TarmacContext& tarmCtx
170 updateCC(tarmCtx, regRel);
173 updateFloat(tarmCtx, regRel);
176 updateInt(tarmCtx, regRel);
179 updateMisc(tarmCtx, regRel);
190 const TarmacContext& tarmCtx,
194 auto thread = tarmCtx.thread;
217 const TarmacContext& tarmCtx,
221 auto thread = tarmCtx.thread;
230 const TarmacContext& tarmCtx,
234 auto thread = tarmCtx.thread;
243 const TarmacContext& tarmCtx,
247 auto thread = tarmCtx.thread;
283 const TarmacContext& tarmCtx)
288 m5::make_unique<TraceInstEntry>(tarmCtx, predicate)
294 const TarmacContext& tarmCtx)
301 m5::make_unique<TraceMemEntry>(tarmCtx,
310 const TarmacContext& tarmCtx)
319 auto single_reg = genRegister<TraceRegEntry>(tarmCtx, reg_id);
331 mergeCCEntry<TraceRegEntry>(queue, tarmCtx);
342 const TarmacContext tarmCtx(
354 addInstEntry(instQueue, tarmCtx);
355 addMemEntry(memQueue, tarmCtx);
356 addRegEntry(regQueue, tarmCtx);
368 addInstEntry(instQueue, tarmCtx);
371 addRegEntry(regQueue, tarmCtx);
372 addMemEntry(memQueue, tarmCtx);