Searched refs:stage1Te (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/arm/
H A Dstage2_lookup.cc76 *destTe = stage1Te;
91 stage1Te.nonCacheable |= stage2Te->nonCacheable;
92 stage1Te.xn |= stage2Te->xn;
94 if (stage1Te.size > stage2Te->size) {
97 stage1Te.vpn = s1Req->getVaddr() >> stage2Te->N;
98 stage1Te.pfn = stage2Te->pfn;
99 stage1Te.size = stage2Te->size;
100 stage1Te.N = stage2Te->N;
101 } else if (stage1Te.size < stage2Te->size) {
107 const Addr ipa = (stage1Te
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H A Dstage2_lookup.hh63 TlbEntry stage1Te; member in class:ArmISA::Stage2LookUp
80 stage1Tlb(s1Tlb), stage2Tlb(s2Tlb), stage1Te(s1Te), s1Req(_req),

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