Lines Matching refs:stage1Te
76 *destTe = stage1Te;
91 stage1Te.nonCacheable |= stage2Te->nonCacheable;
92 stage1Te.xn |= stage2Te->xn;
94 if (stage1Te.size > stage2Te->size) {
97 stage1Te.vpn = s1Req->getVaddr() >> stage2Te->N;
98 stage1Te.pfn = stage2Te->pfn;
99 stage1Te.size = stage2Te->size;
100 stage1Te.N = stage2Te->N;
101 } else if (stage1Te.size < stage2Te->size) {
107 const Addr ipa = (stage1Te.pfn << stage1Te.N);
108 stage1Te.pfn = (pa | (ipa & mask(stage2Te->N))) >> stage1Te.N;
112 stage1Te.pfn = stage2Te->pfn;
116 stage1Te.mtype == TlbEntry::MemoryType::StronglyOrdered) {
117 stage1Te.mtype = TlbEntry::MemoryType::StronglyOrdered;
119 stage1Te.mtype == TlbEntry::MemoryType::Device) {
120 stage1Te.mtype = TlbEntry::MemoryType::Device;
122 stage1Te.mtype = TlbEntry::MemoryType::Normal;
125 if (stage1Te.mtype == TlbEntry::MemoryType::Normal) {
128 stage1Te.innerAttrs == 0) {
130 stage1Te.innerAttrs = 0;
132 stage1Te.innerAttrs == 2) {
134 stage1Te.innerAttrs = 2;
137 stage1Te.innerAttrs = 3;
141 stage1Te.outerAttrs == 0) {
143 stage1Te.outerAttrs = 0;
145 stage1Te.outerAttrs == 2) {
147 stage1Te.outerAttrs = 2;
150 stage1Te.outerAttrs = 3;
153 stage1Te.shareable |= stage2Te->shareable;
154 stage1Te.outerShareable |= stage2Te->outerShareable;
155 if (stage1Te.innerAttrs == 0 &&
156 stage1Te.outerAttrs == 0) {
158 stage1Te.shareable = true;
159 stage1Te.outerShareable = true;
162 stage1Te.shareable = true;
163 stage1Te.outerShareable = true;
165 stage1Te.updateAttributes();