Searched refs:issue (Results 1 - 7 of 7) sorted by relevance
/gem5/ext/googletest/googlemock/scripts/ |
H A D | upload.py | 425 help="Optional description when creating an issue.") 430 "the description when creating an issue.") 443 group.add_option("-i", "--issue", type="int", action="store", 445 help="Issue number to which to add. Defaults to new issue.") 661 def UploadBaseFiles(self, issue, rpc_server, patch_list, patchset, options, 680 url = "/%d/upload_content/%d/%d" % (int(issue), int(patchset), file_id) 1181 def UploadSeparatePatches(issue, rpc_server, patchset, data, options): 1198 url = "/%d/upload_patch/%d" % (int(issue), int(patchset)) 1259 A 2-tuple (issue id, patchset id). 1290 if options.issue [all...] |
/gem5/ext/googletest/googletest/scripts/ |
H A D | upload.py | 425 help="Optional description when creating an issue.") 430 "the description when creating an issue.") 443 group.add_option("-i", "--issue", type="int", action="store", 445 help="Issue number to which to add. Defaults to new issue.") 661 def UploadBaseFiles(self, issue, rpc_server, patch_list, patchset, options, 680 url = "/%d/upload_content/%d/%d" % (int(issue), int(patchset), file_id) 1181 def UploadSeparatePatches(issue, rpc_server, patchset, data, options): 1198 url = "/%d/upload_patch/%d" % (int(issue), int(patchset)) 1259 A 2-tuple (issue id, patchset id). 1290 if options.issue [all...] |
/gem5/src/cpu/o3/ |
H A D | mem_dep_unit.hh | 74 * to issue. Although this is templated, it's somewhat hard to make a generic 162 void issue(const DynInstPtr &inst);
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H A D | mem_dep_unit_impl.hh | 219 // If no store entry, then instruction can issue as soon as the registers 242 // Clear the bit saying this instruction can issue. 552 MemDepUnit<MemDepPred, Impl>::issue(const DynInstPtr &inst) function in class:MemDepUnit
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H A D | inst_queue_impl.hh | 248 .desc("cycles from dispatch to issue") 281 // How long did instructions for a particular FU type wait prior to issue 287 .desc("cycles from operands ready to issue") 299 .desc("Inst issue rate") 629 // to issue, then calling normal insert on the inst. 916 memDepUnit[tid].issue(issuing_inst); 1101 DPRINTF(IQ, "Instruction is ready to issue, putting it onto " 1288 // either at issue time, or when the register is 1461 DPRINTF(IQ, "Checking if memory instruction can issue.\n"); 1472 DPRINTF(IQ, "Instruction is ready to issue, puttin [all...] |
/gem5/src/cpu/minor/ |
H A D | execute.hh | 104 /** Modify instruction trace times on issue */ 237 * the instruction which will then call writeMem or readMem to issue a 260 /** Try and issue instructions from the inputBuffer */ 261 unsigned int issue(ThreadID thread_id);
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H A D | execute.cc | 543 Execute::issue(ThreadID thread_id) function in class:Minor::Execute 556 * instruction fails to issue, this is set to false and we exit issue. 557 * This strictly enforces in-order issue. For other issue behaviours, 595 /* Try and issue an instruction into an FU, assume we didn't and 602 /* Try and issue a single instruction stepping through the 607 DPRINTF(MinorExecute, "Trying to issue inst: %s to FU: %d\n", 612 * issue to any FU but probably should just 'live' in the 645 DPRINTF(MinorExecute, "Can't issue a [all...] |
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