Searched refs:instructions (Results 1 - 25 of 31) sorted by relevance

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/gem5/util/statetrace/base/
H A Dtracechild.hh40 uint64_t instructions; member in class:TraceChild
43 TraceChild() : tracing(false), instructions(0)
H A Dtracechild.cc45 instructions = 0;
126 cerr << "Executed " << instructions
127 << " instructions." << endl;
138 cerr << "Executed " << instructions
139 << " instructions." << endl;
145 cerr << "Executed " << instructions << " instructions." << endl;
/gem5/src/gpu-compute/
H A Dkernel_cfg.hh74 * Number of instructions contained in the block
99 * Compute immediate post-dominator instruction for kernel instructions.
102 const std::vector<GPUStaticInst*>& instructions);
105 ControlFlowInfo(const std::vector<GPUStaticInst*>& instructions);
130 std::vector<GPUStaticInst*> instructions; member in class:ControlFlowInfo
H A Dkernel_cfg.cc51 const std::vector<GPUStaticInst*>& instructions)
53 ControlFlowInfo cfg(instructions);
59 instructions(insts)
85 return instructions.at(block->firstInstruction->instNum() +
101 assert(!instructions.empty());
105 for (const auto &instruction : instructions) {
114 for (const auto &instruction : instructions) {
149 // Unconditional jump instructions have a unique successor
272 for (GPUStaticInst* inst : instructions) {
50 assignImmediatePostDominators( const std::vector<GPUStaticInst*>& instructions) argument
H A Dhsail_code.cc93 std::vector<GPUStaticInst*> instructions; local
96 // walk through instructions in code section and directives in
190 instructions.push_back(iptr);
209 ControlFlowInfo::assignImmediatePostDominators(instructions);
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uf/
H A Dfclass.S7 # Test fclass.s instructions.
H A Dfdiv.S7 # Test f{div|sqrt}.s instructions.
H A Dfadd.S7 # Test f{add|sub|mul}.s instructions.
H A Dfcvt.S7 # Test fcvt.s.{wu|w|lu|l}, fcvt.s.d, and fcvt.d.s instructions.
H A Dfmadd.S7 # Test f[n]m{add|sub}.s and f[n]m{add|sub}.d instructions.
H A Dfcmp.S7 # Test f{eq|lt|le}.s instructions.
H A Dmove.S7 # This test verifies that the fmv.s.x, fmv.x.s, and fsgnj[x|n].d instructions
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ud/
H A Dfadd.S7 # Test f{add|sub|mul}.d instructions.
H A Dfdiv.S7 # Test f{div|sqrt}.d instructions.
H A Dfcmp.S7 # Test f{eq|lt|le}.d instructions.
H A Dfmadd.S7 # Test f[n]m{add|sub}.s and f[n]m{add|sub}.d instructions.
H A Dfcvt.S7 # Test fcvt.d.{wu|w|lu|l}, fcvt.s.d, and fcvt.d.s instructions.
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/
H A Djal.S36 # Test delay slot instructions not executed nor bypassed
H A Dbeq.S50 # Test delay slot instructions not executed nor bypassed
H A Dbge.S53 # Test delay slot instructions not executed nor bypassed
H A Dblt.S50 # Test delay slot instructions not executed nor bypassed
H A Dbne.S50 # Test delay slot instructions not executed nor bypassed
H A Djalr.S42 # Test delay slot instructions not executed nor bypassed
H A Dbgeu.S53 # Test delay slot instructions not executed nor bypassed
H A Dbltu.S50 # Test delay slot instructions not executed nor bypassed

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