Searched refs:cell (Results 1 - 13 of 13) sorted by relevance

/gem5/src/systemc/tests/systemc/misc/stars/star107755/
H A Dstar107755.cpp42 sc_uint<14> cell[2]; local
64 cell[0] = dat0;
68 out0 = cell[0];
/gem5/src/systemc/tests/systemc/misc/stars/star109180/
H A Dstar109180.cpp42 sc_uint<14> cell[2]; local
64 cell[0] = dat0;
68 out0 = cell[0];
/gem5/ext/mcpat/cacti/
H A Dsubarray.cc45 cell(dp.cell), cam_cell(dp.cam_cell), is_fa(is_fa_) {
56 area.h = cell.h * num_rows;
58 area.w = cell.w * num_cols +
74 area.w = cam_cell.w * num_cols_fa_cam + cell.w * num_cols_fa_ram
97 // return (is_fa==false? cell.get_area() * num_rows * num_cols
103 return (cell.get_area() * num_rows * num_cols);
107 //cout<<"diff" <<cam_cell.get_area()*(num_rows+1)*(num_cols_fa_cam + num_cols_fa_ram)- cam_cell.h*(num_rows+1)*(cam_cell.w*num_cols_fa_cam + cell.w*num_cols_fa_ram)<<endl;
109 (cam_cell.w*num_cols_fa_cam + cell.w*num_cols_fa_ram));
120 double c_w_metal = cell
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H A Dsubarray.h56 Area cell, cam_cell; member in class:Subarray
H A Dparameter.cc146 cout << indent_str << "SRAM cell transistor: " << endl;
184 use_inp_params(0), cell(), is_valid(true) {
204 is_main_mem(is_main_mem_), cell(), is_valid(false) {
330 cell.h = g_tp.sram.b_h + 2 * wire_local.pitch *
333 cell.w = g_tp.sram.b_w + 2 * wire_local.pitch *
341 cell.h = g_tp.sram.b_h + 2 * wire_local.pitch * (g_ip->num_rw_ports - 1 + g_ip->num_rd_ports +
343 cell.w = g_tp.sram.b_w + 2 * wire_local.pitch * (g_ip->num_rw_ports - 1 + g_ip->num_wr_ports +
348 cell.h = g_tp.dram.b_h;
349 cell.w = g_tp.dram.b_w;
351 cell
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H A Dmat.cc54 cell(subarray.cell), cam_cell(subarray.cam_cell),
69 camFlag = (is_fa || pure_cam);//although cam_cell.w = cell.w for fa, we still differentiate them.
108 R_wire_wl_drv_out = subarray.num_cols * cell.w * g_tp.wire_local.R_per_um;
110 R_wire_wl_drv_out = (subarray.num_cols_fa_cam * cam_cell.w + subarray.num_cols_fa_ram * cell.w) * g_tp.wire_local.R_per_um ;
115 double R_wire_bit_mux_dec_out = num_subarrays_per_row * subarray.num_cols * g_tp.wire_inside_mat.R_per_um * cell.w;//TODO:revisit for FA
116 double R_wire_sa_mux_dec_out = num_subarrays_per_row * subarray.num_cols * g_tp.wire_inside_mat.R_per_um * cell.w;
121 gate_C(g_tp.w_nmos_b_mux, 0, is_dram) + // 2 transistor per cell
123 g_tp.wire_inside_mat.C_per_um * cell.get_w();
131 g_tp.wire_inside_mat.C_per_um * cell
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H A Dmat.h109 Area cell, cam_cell; member in class:Mat
H A Ddecoder.h71 const Area & cell; member in class:Decoder
H A Dparameter.h219 DeviceType sram_cell; // SRAM cell transistor
223 DeviceType cam_cell; // SRAM cell transistor
349 Area cell, cam_cell;//cell is the sram_cell in both nomal cache/ram and FA. member in class:DynamicParameter
H A Drouter.cc188 dyn_p.cell.h = g_tp.sram.b_h + 2 * g_tp.wire_outside_mat.pitch * (dyn_p.num_wr_ports +
190 dyn_p.cell.w = g_tp.sram.b_w + 2 * g_tp.wire_outside_mat.pitch * (dyn_p.num_rw_ports - 1 +
H A Ddecoder.cc62 is_wl_tr(is_wl_tr_), cell(cell_) {
93 assert(cell.h > 0);
94 assert(cell.w > 0);
95 // the height of a row-decoder-driver cell is fixed to be 4 * cell.h;
96 //area.h = 4 * cell.h;
97 area.h = g_tp.h_dec * cell.h;
/gem5/src/python/m5/ext/pyfdt/
H A Dpyfdt.py997 cell = Struct(self.__fdt_dt_cell_format)
1001 data = self.infile.read(cell.size)
1002 if len(data) < cell.size:
1004 tag, = cell.unpack_from(data)
/gem5/ext/mcpat/
H A Dlogic.cc827 Area cell; local
831 cell.h = g_tp.cell_h_def;
832 cell.w = g_tp.cell_h_def;
851 cell);

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