Searched refs:a0 (Results 1 - 25 of 75) sorted by relevance

123

/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/
H A Dtest.S17 li a0, 0
18 li a0, 0
19 li a0, 0
20 li a0, 0
23 addi a1, a0, 1
24 addi a1, a0, 1
25 addi a1, a0, 1
26 addi a1, a0, 1
27 addi a1, a0, 1
28 addi a1, a0,
[all...]
H A Dauipc.S16 TEST_CASE(2, a0, 10000, \
18 lla a0, 1f + 10000; \
20 1: sub a0, a0, a1; \
23 TEST_CASE(3, a0, -10000, \
25 lla a0, 1f - 10000; \
27 1: sub a0, a0, a1; \
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/
H A Dmcsr.S18 TEST_CASE(2, a0, 0x2, csrr a0, misa; srl a0, a0, 62)
20 TEST_CASE(2, a0, 0x1, csrr a0, misa; srl a0, a0, 30)
24 TEST_CASE(3, a0, 0x0, csrr a0, mharti
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uamt/
H A Damoadd_d.S76 la a0, shared_var
78 amoadd.d zero, t0, (a0)
82 la a0, barrier
83 amoadd.d zero, t0, (a0)
91 la a0, shared_var
93 ld a0, (a0)
94 bne a0, a1, _fail
95 li a0, SUCCESS
99 li a0, FAILUR
[all...]
H A Damoor_d.S71 la a0, shared_var
80 amoor.d zero, t0, (a0)
83 la a0, barrier
84 amoadd.d zero, t0, (a0)
92 la a0, shared_var
94 ld a0, (a0)
95 bne a0, a1, _fail
96 li a0, SUCCESS
100 li a0, FAILUR
[all...]
H A Damoxor_d.S71 la a0, shared_var
80 amoxor.d zero, t0, (a0)
83 la a0, barrier
84 amoadd.d zero, t0, (a0)
92 la a0, shared_var
94 ld a0, (a0)
95 bne a0, a1, _fail
96 li a0, SUCCESS
100 li a0, FAILUR
[all...]
H A Damoand_d.S58 la a0, shared_var
60 sd t0, (a0)
78 la a0, shared_var
87 amoand.d zero, t0, (a0)
90 la a0, barrier
91 amoadd.d zero, t0, (a0)
99 la a0, shared_var
101 ld a0, (a0)
102 bne a0, a
[all...]
H A Damomax_d.S58 la a0, shared_var
60 sd t0, (a0)
78 la a0, shared_var
87 amomax.d zero, t0, (a0)
90 la a0, barrier
91 amoadd.d zero, t0, (a0)
99 la a0, shared_var
101 ld a0, (a0)
102 bne a0, a
[all...]
H A Damomaxu_d.S58 la a0, shared_var
60 sd t0, (a0)
78 la a0, shared_var
87 amomaxu.d zero, t0, (a0)
90 la a0, barrier
91 amoadd.d zero, t0, (a0)
99 la a0, shared_var
101 ld a0, (a0)
102 bne a0, a
[all...]
H A Damomin_d.S58 la a0, shared_var
60 sd t0, (a0)
78 la a0, shared_var
87 amomin.d zero, t0, (a0)
90 la a0, barrier
91 amoadd.d zero, t0, (a0)
99 la a0, shared_var
101 ld a0, (a0)
102 bne a0, a
[all...]
H A Damominu_d.S58 la a0, shared_var
60 sd t0, (a0)
78 la a0, shared_var
87 amominu.d zero, t0, (a0)
90 la a0, barrier
91 amoadd.d zero, t0, (a0)
99 la a0, shared_var
101 ld a0, (a0)
102 bne a0, a
[all...]
H A Dlrsc_d.S79 la a0, shared_var
82 lr.d.aq s2, (a0) // load and reserve a0
84 sc.d.rl s2, t0, (a0) // try to lock a0
91 sd zero, (a0) // release the lock by storing 0 to a0
96 la a0, barrier
97 amoadd.d zero, t0, (a0) // signal this thread's completion
105 la a0, va
[all...]
H A Damoswap_d.S79 la a0, shared_var
82 amoswap.d.aq s2, t0, (a0) // try to swap t0 with the lock
89 amoswap.d.rl zero, zero, (a0)// release the lock by swapping back 0
94 la a0, barrier
95 amoadd.d zero, t0, (a0) // signal this thread's completion
103 la a0, var
105 ld a0, (a0)
106 bne a0, a1, _fail
107 li a0, SUCCES
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uf/
H A Dmove.S17 TEST_CASE(2, a1, 1, csrwi fcsr, 1; li a0, 0x1234; fssr a1, a0)
18 TEST_CASE(3, a0, 0x34, frsr a0)
19 TEST_CASE(4, a0, 0x14, frflags a0)
20 TEST_CASE(5, a0, 0x01, csrrwi a0, frm, 2)
21 TEST_CASE(6, a0, 0x54, frsr a0)
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ua/
H A Dtest.S16 la a0, shared_var
17 amoadd.w t0, t1, 0(a0)
18 lr.w t2, 0(a0)
19 //sc.w t0, t1, 0(a0)
H A Dlrsc.S17 la a0, coreid
19 amoadd.w a2, a1, (a0)
25 1: lw a1, (a0)
30 la a0, foo; \
31 sc.w a4, x0, (a0); \
37 la a0, foo; \
38 add a1, a0, 1024; \
40 sc.w a4, a1, (a0); \
46 la a0, foo
49 1: lr.w a4, (a0)
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uc/
H A Drvc.S37 RVC_TEST_CASE (3, a0, 0x1234 + 1020, c.addi4spn a0, sp, 1020)
42 RVC_TEST_CASE (6, a2, 0xfffffffffedcba99, c.lw a0, 4(a1); addi a0, a0, 1; c.sw a0, 4(a1); c.lw a2, 4(a1))
44 RVC_TEST_CASE (7, a2, 0xfedcba9976543211, c.ld a0, 0(a1); addi a0, a0, 1; c.sd a0,
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64samt/
H A Dsysfutex3_d.S59 li a0, NUM_THREADS
63 ld a0, (t6)
64 beqz a0, _fail // exit if there's no worker thread
69 ld a0, (t6)
73 ld a0, (t6)
77 ld a0, (t6)
80 li a0, SUCCESS
95 la a0, futex_X
106 beqz a0, 1b
116 la a0, futex_
[all...]
H A Dsysfutex1_d.S57 li a0, MAX_NUM_THREADS
61 ld a0, (t6)
62 beqz a0, _fail // exit if there's no worker thread
67 ld a0, (t6)
71 ld a0, (t6)
75 ld a0, (t6)
78 li a0, SUCCESS
95 la a0, futex_X
101 add t0, t0, a0 // track the number of waken threads so far
117 la a0, futex_
[all...]
H A Dsysfutex_d.S58 li a0, NUM_THREADS
62 ld a0, (t6)
63 beqz a0, _fail // exit if there's no worker thread
67 ld a0, (t6)
71 ld a0, (t6)
75 ld a0, (t6)
78 li a0, SUCCESS
95 la a0, futex_X
102 beqz a0, 1b
110 la a0, futex_
[all...]
H A Dsysclone_d.S62 li a0, MAX_NUM_THREADS
66 ld a0, (t6)
67 beqz a0, _fail // exit if there's no worker thread
71 ld a0, (t6)
75 ld a0, (t6)
78 li a0, SUCCESS
92 sd a0, (sp)
93 sd a0, (tp)
115 // This function takes a number of threads to check in a0
119 mv t0, a0 // ge
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/env/ps/
H A Driscv_test.h51 # define CHECK_XLEN li a0, 1; slli a0, a0, 31; bgez a0, 1f; RVTEST_PASS; 1:
53 # define CHECK_XLEN li a0, 1; slli a0, a0, 31; bltz a0, 1f; RVTEST_PASS; 1:
83 li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \
84 csrs mstatus, a0; \
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ud/
H A Dldst.S17 TEST_CASE(2, a0, 0x40000000bf800000, fld f2, 0(s0); fsd f2, 16(s0); ld a0, 16(s0))
18 TEST_CASE(3, a0, 0x40000000bf800000, fld f2, 0(s0); fsw f2, 16(s0); ld a0, 16(s0))
19 TEST_CASE(4, a0, 0x40000000bf800000, flw f2, 0(s0); fsw f2, 16(s0); ld a0, 16(s0))
20 TEST_CASE(5, a0, 0xc080000040400000, fld f2, 8(s0); fsd f2, 16(s0); ld a0, 16(s0))
21 TEST_CASE(6, a0, 0xffffffff40400000, flw f2, 8(s0); fsd f2, 16(s0); ld a0, 1
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/env/v/
H A Dentry.S35 la a0, userstart
40 LOAD t0,33*REGBYTES(a0)
42 LOAD x1,1*REGBYTES(a0)
43 LOAD x2,2*REGBYTES(a0)
44 LOAD x3,3*REGBYTES(a0)
45 LOAD x4,4*REGBYTES(a0)
46 LOAD x5,5*REGBYTES(a0)
47 LOAD x6,6*REGBYTES(a0)
48 LOAD x7,7*REGBYTES(a0)
49 LOAD x8,8*REGBYTES(a0)
[all...]
H A Driscv_test.h27 #define RVTEST_PASS li a0, 1; scall
30 #define RVTEST_FAIL sll a0, TESTNUM, 1; 1:beqz a0, 1b; or a0, a0, 1; scall;

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