Searched refs:SRE (Results 1 - 2 of 2) sorted by relevance
/gem5/src/dev/arm/ | ||
H A D | gic_v3_cpu_interface.hh | 124 Bitfield<0> SRE; member in class:Gicv3CPUInterface 132 Bitfield<0> SRE; member in class:Gicv3CPUInterface 140 Bitfield<0> SRE; member in class:Gicv3CPUInterface |
H A D | gic_v3_cpu_interface.cc | 506 * SRE [0] == 1 (Only system register interface supported, RAO/WI) 509 icc_sre_el1.SRE = 1; 524 * SRE [0] == 1 (Only system register interface supported, RAO/WI) 527 icc_sre_el2.SRE = 1; 545 * SRE [0] == 1 (Only system register interface supported, RAO/WI) 548 icc_sre_el3.SRE = 1; |
Completed in 14 milliseconds