Searched refs:PCI_CACHE_LINE_SIZE (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/dev/pci/ | ||
| H A D | pcireg.h | 98 #define PCI_CACHE_LINE_SIZE 0x0C // Cache Line Size ro+ macro |
| H A D | device.cc | 315 case PCI_CACHE_LINE_SIZE: 344 case PCI_CACHE_LINE_SIZE: |
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