Searched refs:MISCREG_SCRATCHPAD_R0 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/sparc/
H A Dmiscregs.hh95 MISCREG_SCRATCHPAD_R0, /* 60 */ enumerator in enum:SparcISA::MiscRegIndex
H A Dutility.cc167 dest->setMiscRegNoEffect(MISCREG_SCRATCHPAD_R0,
168 src->readMiscRegNoEffect(MISCREG_SCRATCHPAD_R0));
H A Disa.cc300 case MISCREG_SCRATCHPAD_R0:
513 case MISCREG_SCRATCHPAD_R0:
H A Dtlb.cc946 pkt->setBE(tc->readMiscReg(MISCREG_SCRATCHPAD_R0 + (va >> 3)));
1144 tc->setMiscReg(MISCREG_SCRATCHPAD_R0 + (va >> 3), data);

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