Searched refs:MISCREG_ICH_AP0R1 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/arm/
H A Dmiscregs.hh848 MISCREG_ICH_AP0R1, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc741 return MISCREG_ICH_AP0R1;
4680 .mapsTo(MISCREG_ICH_AP0R1);
4867 InitReg(MISCREG_ICH_AP0R1)
/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc630 case MISCREG_ICH_AP0R1:
1576 case MISCREG_ICH_AP0R1:

Completed in 31 milliseconds