Searched refs:MISCREG_ICC_IGRPEN1_EL1_S (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc207 MISCREG_ICC_IGRPEN1_EL1_S)).Enable;
1375 MISCREG_ICC_IGRPEN1_EL1_S, icc_igrpen1_el3.EnableGrp1S);
2309 isa->readMiscRegNoEffect(MISCREG_ICC_IGRPEN1_EL1_S);
/gem5/src/arch/arm/
H A Dmiscregs.hh719 MISCREG_ICC_IGRPEN1_EL1_S, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc4656 InitReg(MISCREG_ICC_IGRPEN1_EL1_S)

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