Searched refs:MISCREG_ICC_AP1R0_EL1_NS (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/arm/
H A Dgic_v3_cpu_interface.cc1721 apr_misc_reg = MISCREG_ICC_AP1R0_EL1_NS;
1828 apr_idx = MISCREG_ICC_AP1R0_EL1_NS;
2003 int g1nz_ctz = ctz32(isa->readMiscRegNoEffect(MISCREG_ICC_AP1R0_EL1_NS));
2286 isa->readMiscRegNoEffect(MISCREG_ICC_AP1R0_EL1_NS) |
/gem5/src/arch/arm/
H A Dmiscregs.hh688 MISCREG_ICC_AP1R0_EL1_NS, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc4538 InitReg(MISCREG_ICC_AP1R0_EL1_NS)

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