Searched refs:CP0_Config1_WR (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/mips/
H A Dtypes.hh87 CP0_Config1_MD(false), CP0_Config1_PC(false), CP0_Config1_WR(false),
128 bool CP0_Config1_WR;// Page 113 member in struct:MipsISA::CoreSpecific
H A Disa.cc217 cfg1.wr = cp.CP0_Config1_WR;

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