Searched refs:val (Results 101 - 125 of 315) sorted by relevance

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/gem5/src/cpu/o3/
H A Dthread_context_impl.hh265 O3ThreadContext<Impl>::setIntRegFlat(RegIndex reg_idx, RegVal val) argument
267 cpu->setArchIntReg(reg_idx, val, thread->threadId());
274 O3ThreadContext<Impl>::setFloatRegFlat(RegIndex reg_idx, RegVal val) argument
276 cpu->setArchFloatReg(reg_idx, val, thread->threadId());
284 RegIndex reg_idx, const VecRegContainer& val)
286 cpu->setArchVecReg(reg_idx, val, thread->threadId());
294 const ElemIndex& elemIndex, const VecElem& val)
296 cpu->setArchVecElem(idx, elemIndex, val, thread->threadId());
303 const VecPredRegContainer& val)
305 cpu->setArchVecPredReg(reg_idx, val, threa
283 setVecRegFlat( RegIndex reg_idx, const VecRegContainer& val) argument
293 setVecElemFlat(RegIndex idx, const ElemIndex& elemIndex, const VecElem& val) argument
302 setVecPredRegFlat(RegIndex reg_idx, const VecPredRegContainer& val) argument
312 setCCRegFlat(RegIndex reg_idx, RegVal val) argument
321 pcState(const TheISA::PCState &val) argument
330 pcStateNoRecord(const TheISA::PCState &val) argument
346 setMiscRegNoEffect(RegIndex misc_reg, RegVal val) argument
355 setMiscReg(RegIndex misc_reg, RegVal val) argument
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/gem5/src/arch/arm/insts/
H A Dvfp.hh162 } val; local
163 val.fp = fp;
164 return val.bits;
174 } val; local
175 val.fp = fp;
176 return val.bits;
186 } val; local
187 val.bits = bits;
188 return val.fp;
198 } val; local
205 isSnan(fpType val) argument
246 lowFromDouble(double val) argument
252 highFromDouble(double val) argument
265 vfpFpToFixed(T val, bool isSigned, uint8_t width, uint8_t imm, bool useRmode = true, VfpRoundingMode roundMode = VfpRoundZero, bool aarch64 = false) argument
766 T val; local
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/gem5/src/base/
H A Dbitunion.hh87 void setter(Storage &storage, Type val) = delete;
97 operator=(const Type val) argument
99 Base::setter(__storage, val);
100 return val;
120 Type operator=(const Type val) { return Impl::operator=(val); } argument
149 Type operator=(const Type val) { return Impl::operator=(val); } argument
175 setter(Storage &storage, uint64_t val) argument
177 replaceBits(storage, first, last, val);
195 setter(Storage &storage, int64_t val) argument
242 BitUnionOperators(typename Base::__StorageType const &val) argument
255 operator =(typename Base::__StorageType const &val) argument
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/gem5/src/arch/mips/
H A Dutility.cc102 roundFP(double val, int digits) argument
105 val = val * digit_offset;
106 val = val + 0.5;
107 val = floor(val);
108 val = val / digit_offset;
109 return val;
113 truncFP(double val) argument
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/gem5/src/cpu/simple/
H A Dexec_context.hh188 setIntRegOperand(const StaticInst *si, int idx, RegVal val) override
193 thread->setIntReg(reg.index(), val);
210 setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val) override
215 thread->setFloatReg(reg.index(), val);
241 const VecRegContainer& val) override
246 thread->setVecReg(reg, val);
289 const LD& val)
294 return thread->setVecLane(reg, val);
299 const LaneData<LaneSize::Byte>& val) override
300 { return setVecLaneOperandT(si, idx, val); }
288 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val) argument
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/gem5/src/systemc/tests/systemc/misc/synth/inlining/test1/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/src/systemc/tests/systemc/misc/synth/inlining/test2/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/src/systemc/tests/systemc/misc/synth/inlining/test3/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/src/systemc/tests/systemc/misc/synth/inlining/test4/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/src/systemc/tests/systemc/misc/synth/inlining/test5/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/src/systemc/tests/systemc/misc/synth/inlining/test6/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test01/
H A Ddefine.h45 #define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME)
/gem5/tests/gem5/memory/
H A Dtest.py53 args = ['--' + key + '=' + val for key,val in params.iteritems()]
/gem5/src/cpu/minor/
H A Dexec_context.hh200 setIntRegOperand(const StaticInst *si, int idx, RegVal val) override
204 thread.setIntReg(reg.index(), val);
208 setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val) override
212 thread.setFloatReg(reg.index(), val);
217 const TheISA::VecRegContainer& val) override
221 thread.setVecReg(reg, val);
226 const TheISA::VecPredRegContainer& val) override
230 thread.setVecPredReg(reg, val);
278 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val) argument
282 return thread.setVecLane(reg, val);
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/gem5/src/arch/sparc/
H A Dua2005.cc92 ISA::setFSReg(int miscReg, RegVal val, ThreadContext *tc) argument
100 setMiscRegNoEffect(miscReg, val);;
104 return setMiscReg(MISCREG_SOFTINT, ~val & softint, tc);
106 return setMiscReg(MISCREG_SOFTINT, val | softint, tc);
111 setMiscRegNoEffect(miscReg, val);
120 DPRINTF(Timer, "writing to TICK compare register value %#X\n", val);
126 setMiscRegNoEffect(miscReg, val);
136 DPRINTF(Timer, "writing to sTICK compare register value %#X\n", val);
140 setMiscRegNoEffect(miscReg, val);
144 setMiscRegNoEffect(miscReg, val);
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/gem5/src/arch/arm/
H A Dpmu.cc194 PMU::setMiscReg(int misc_reg, RegVal val) argument
197 miscRegName[unflattenMiscReg(misc_reg)], val);
202 setControlReg(val);
207 reg_pmcnten |= val;
213 reg_pmcnten &= ~val;
219 setOverflowStatus(reg_pmovsr & ~val);
225 swIncrementEvent->write(val);
231 cycleCounter.setValue(val);
236 reg_pmselr = val;
247 setCounterTypeRegister(misc_reg - MISCREG_PMEVTYPER0_EL0, val);
402 setControlReg(PMCR_t val) argument
456 increment(const uint64_t val) argument
474 notify(const uint64_t &val) argument
559 setValue(uint64_t val) argument
603 setCounterValue(CounterId id, uint64_t val) argument
630 setCounterTypeRegister(CounterId id, PMEVTYPER_t val) argument
805 write(uint64_t val) argument
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/gem5/src/cpu/checker/
H A Dcpu.hh270 setVecLaneOperandT(const StaticInst *si, int idx, const LD& val) argument
274 return thread->setVecLane(reg, val);
278 const LaneData<LaneSize::Byte>& val) override
280 setVecLaneOperandT(si, idx, val);
284 const LaneData<LaneSize::TwoByte>& val) override
286 setVecLaneOperandT(si, idx, val);
290 const LaneData<LaneSize::FourByte>& val) override
292 setVecLaneOperandT(si, idx, val);
296 const LaneData<LaneSize::EightByte>& val) override
298 setVecLaneOperandT(si, idx, val);
371 setScalarResult(val); variable
380 setScalarResult(val); variable
399 setVecResult(val); variable
409 setVecElemResult(val); variable
418 setVecPredResult(val); variable
467 setMiscRegNoEffect(int misc_reg, RegVal val) argument
503 recordPCChange(const TheISA::PCState &val) argument
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/gem5/ext/systemc/src/sysc/datatypes/int/
H A Dsc_int_base.cpp204 int left_shift; // Left shift for val.
207 uint_type val; // Selection value extracted from m_obj_p. local
214 val = (m_obj_p->m_val & mask) >> m_right;
215 non_zero = val != 0;
222 ((val << left_shift) & DIGIT_MASK));
230 val >>= (BITS_PER_DIGIT-left_shift);
231 dst_p[dst_i] = (sc_digit)(val & DIGIT_MASK);
238 val >>= (BITS_PER_DIGIT-left_shift);
239 dst_p[dst_i++] = (sc_digit)(val & DIGIT_MASK);
240 val >>
272 int_type val = m_obj_p->m_val; local
600 uint_type val = m_val & (mask >> m_ulen); local
652 uint_type val; // Value for this object. local
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H A Dsc_uint_base.cpp156 int left_shift; // Left shift for val.
177 int left_shift; // Left shift for val.
180 uint_type val; // Selection value extracted from m_obj_p. local
187 val = (m_obj_p->m_val & mask) >> m_right;
188 result = val != 0;
195 ((val << left_shift) & DIGIT_MASK));
203 val >>= (BITS_PER_DIGIT-left_shift);
204 dst_p[dst_i] = (sc_digit)val;
211 val >>= (BITS_PER_DIGIT-left_shift);
212 dst_p[dst_i++] = (sc_digit)(val
245 uint_type val = m_obj_p->m_val; local
572 uint_type val = m_val; local
627 uint_type val; // Value for this object. local
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/gem5/src/systemc/dt/int/
H A Dsc_int_base.cc205 int left_shift; // Left shift for val.
208 uint_type val; // Selection value extracted from m_obj_p. local
215 val = (m_obj_p->m_val & mask) >> m_right;
216 non_zero = val != 0;
221 ((val << left_shift) & DIGIT_MASK));
227 val >>= (BITS_PER_DIGIT - left_shift);
228 dst_p[dst_i] = (sc_digit)(val & DIGIT_MASK);
234 val >>= (BITS_PER_DIGIT - left_shift);
235 dst_p[dst_i++] = (sc_digit)(val & DIGIT_MASK);
236 val >>
267 int_type val = m_obj_p->m_val; local
563 uint_type val = m_val & (mask >> m_ulen); local
617 uint_type val; // Value for this object. local
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H A Dsc_uint_base.cc167 int left_shift; // Left shift for val.
190 int left_shift; // Left shift for val.
193 uint_type val; // Selection value extracted from m_obj_p. local
200 val = (m_obj_p->m_val & mask) >> m_right;
201 result = val != 0;
206 ((val << left_shift) & DIGIT_MASK));
212 val >>= (BITS_PER_DIGIT-left_shift);
213 dst_p[dst_i] = (sc_digit)val;
219 val >>= (BITS_PER_DIGIT-left_shift);
220 dst_p[dst_i++] = (sc_digit)(val
252 uint_type val = m_obj_p->m_val; local
559 uint_type val = m_val; local
616 uint_type val; // Value for this object. local
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/gem5/util/stats/
H A Doutput.py58 for i,val in enumerate(value):
59 if val != 0.0:
60 value[i] = 1 / val
62 valstring = ', '.join([ valformat % val for val in value ])
125 val = self.info.get(job, self.stat)
126 if val is None:
130 if isinstance(val, (list, tuple)):
131 if len(val) == 1:
132 val
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/gem5/src/dev/x86/
H A Dspeaker.cc61 SpeakerControl val = pkt->getLE<uint8_t>(); local
62 controlVal.gate = val.gate;
64 if (!val.gate)
70 controlVal.speaker = val.speaker;
/gem5/src/arch/power/linux/
H A Dprocess.hh51 void setSyscallArg(ThreadContext *tc, int i, RegVal val);
/gem5/src/python/m5/
H A Dproxy.py186 val = getattr(obj, self._attr)
188 if hasattr(val, '_visited'):
189 visited = getattr(val, '_visited')
194 if not isproxy(val):
198 obj = val
202 while isproxy(val):
203 val = val.unproxy(obj)
206 val = getattr(val,
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