Searched refs:std (Results 351 - 375 of 1914) sorted by relevance

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/gem5/src/arch/riscv/insts/
H A Dcompressed.hh51 std::string generateDisassembly(
/gem5/src/base/
H A Dlogging.cc58 void log(const Loc &loc, std::string s) override { std::cerr << s; }
68 log(const Loc &loc, std::string s) override
70 std::stringstream ss;
H A Dcompiler.hh91 // std::make_unique redefined for C++11 compilers
97 using std::make_unique;
103 std::unique_ptr<T>
106 return std::unique_ptr<T>(
107 new T( std::forward<Args>(constructor_args)... )
/gem5/src/mem/ruby/network/fault_model/
H A DFaultModel.hh114 std::string fault_type_to_string(int fault_type_index);
136 std::vector <system_conf> configurations;
137 std::vector <system_conf> routers;
138 std::vector <int> temperature_weights;
/gem5/src/systemc/core/
H A Dobject.cc49 findObjectIn(Objects &objects, const std::string &name)
66 popObject(Objects *objects, const std::string &name)
70 std::swap(objects->back(), *it);
75 nameIsUnique(Objects *objects, Events *events, const std::string &name)
104 std::string original_name = _basename;
115 std::string path = "";
117 path = std::string(sc_p->basename()) + std::string(".") + path;
122 std::string message = path + original_name +
172 Object::print(std
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/gem5/src/systemc/tests/tlm/static_extensions/ext2gp2ext/
H A DSimpleLTTarget_ext.h71 std::cout << name() << ": ERROR, extension not present" << std::endl;
75 std::cout << name() << ": OK, extension data = "
76 << tmp_ext->m_data << std::endl;
83 std::cout << name() << ": Received write request: A = 0x"
84 << std::hex << (unsigned int)address
85 << ", D = 0x" << data << std::dec
86 << " @ " << sc_core::sc_time_stamp() << std::endl;
92 std::cout << name() << ": Received read request: A = 0x"
93 << std
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/gem5/src/systemc/tests/tlm/static_extensions/gp2ext/
H A DSimpleLTTarget_ext.h71 std::cout << name() << ": ERROR, extension not present" << std::endl;
75 std::cout << name() << ": OK, extension data = "
76 << tmp_ext->m_data << std::endl;
83 std::cout << name() << ": Received write request: A = 0x"
84 << std::hex << (unsigned int)address
85 << ", D = 0x" << data << std::dec
86 << " @ " << sc_core::sc_time_stamp() << std::endl;
92 std::cout << name() << ": Received read request: A = 0x"
93 << std
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/gem5/src/mem/cache/replacement_policies/
H A Dbip_rp.hh81 void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
/gem5/ext/googletest/googlemock/src/
H A Dgmock_main.cc48 std::cout << "Running main() from gmock_main.cc\n";
/gem5/src/mem/cache/prefetch/
H A Ddelta_correlating_prediction_tables.hh72 std::vector<Addr> deltas;
100 void getCandidates(std::vector<QueuedPrefetcher::AddrPriority> &pfs,
119 std::vector<QueuedPrefetcher::AddrPriority> &addresses);
135 std::vector<AddrPriority> &addresses) override;
H A Dtagged.hh55 std::vector<AddrPriority> &addresses) override;
/gem5/src/mem/ruby/network/
H A DBasicLink.hh54 void print(std::ostream& out) const;
61 inline std::ostream&
62 operator<<(std::ostream& out, const BasicLink& obj)
65 out << std::flush;
/gem5/src/systemc/ext/tlm_core/1/analysis/
H A Danalysis_port.hh52 typename std::deque<tlm_analysis_if<T> *>::iterator i =
53 std::remove(m_interfaces.begin(), m_interfaces.end(), &_if);
65 typename std::deque<tlm_analysis_if<T> *>::iterator i;
73 std::deque<tlm_analysis_if<T> *> m_interfaces;
/gem5/src/systemc/ext/tlm_core/1/req_rsp/channels/fifo/
H A Dcircular_buffer.hh92 std::cout << "Buffer debug" << std::endl;
93 std::cout << "Size : " << size() << std::endl;
94 std::cout << "Free/Used " << free() << "/" << used() << std::endl;
95 std::cout << "Indices : r/w = " << m_ri << "/" << m_wi << std::endl;
98 std::cout << "empty" << std
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/gem5/src/cpu/pred/
H A Dbi_mode.hh90 std::vector<unsigned> globalHistoryReg;
102 std::vector<SatCounter> choiceCounters;
104 std::vector<SatCounter> takenCounters;
106 std::vector<SatCounter> notTakenCounters;
/gem5/src/cpu/testers/rubytest/
H A DCheck.hh56 void print(std::ostream& out) const;
81 inline std::ostream&
82 operator<<(std::ostream& out, const Check& obj)
85 out << std::flush;
/gem5/src/sim/
H A Dport.cc52 Port::Port(const std::string& _name, PortID _id) :
/gem5/src/cpu/minor/
H A Dfunc_unit.hh77 std::vector<MinorOpClass *> opClasses;
81 std::vector<bool> capabilityList;
104 std::string description;
128 std::vector<Cycles> srcRegsRelativeLats;
164 std::vector<unsigned int> cantForwardFromFUIndices;
167 std::vector<MinorFUTiming *> timings;
184 std::vector<MinorFU *> funcUnits;
210 void reportData(std::ostream &os) const;
234 std::bitset<Num_OpClasses> capabilityList;
238 std
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/gem5/src/dev/
H A Dintel_8254_timer.hh110 std::string _name;
111 const std::string &name() const { return _name; }
151 Counter(Intel8254Timer *p, const std::string &name, unsigned int num);
182 void serialize(const std::string &base, CheckpointOut &cp) const;
190 void unserialize(const std::string &base, CheckpointIn &cp);
197 std::string _name;
198 const std::string &name() const { return _name; }
215 Intel8254Timer(EventManager *em, const std::string &name,
218 Intel8254Timer(EventManager *em, const std::string &name);
249 void serialize(const std
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/gem5/src/gpu-compute/
H A Dtlb_coalescer.hh91 typedef std::vector<PacketPtr> coalescedReq;
110 typedef std::unordered_map<int64_t, std::vector<coalescedReq>> CoalescingFIFO;
123 typedef std::unordered_map<Addr, coalescedReq> CoalescingTable;
158 CpuSidePort(const std::string &_name, TLBCoalescer *tlb_coalescer,
185 MemSidePort(const std::string &_name, TLBCoalescer *tlb_coalescer,
190 std::deque<PacketPtr> retries;
210 std::vector<CpuSidePort*> cpuSidePort;
212 std::vector<MemSidePort*> memSidePort;
214 Port &getPort(const std
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/gem5/ext/pybind11/include/pybind11/detail/
H A Dinit.h44 template <typename Class> using is_alias_constructible = std::is_constructible<Alias<Class>, Cpp<Class> &&>;
60 template <typename Class, typename... Args, detail::enable_if_t<std::is_constructible<Class, Args...>::value, int> = 0>
61 inline Class *construct_or_initialize(Args &&...args) { return new Class(std::forward<Args>(args)...); }
62 template <typename Class, typename... Args, detail::enable_if_t<!std::is_constructible<Class, Args...>::value, int> = 0>
63 inline Class *construct_or_initialize(Args &&...args) { return new Class{std::forward<Args>(args)...}; }
71 void construct_alias_from_cpp(std::true_type /*is_alias_constructible*/,
73 v_h.value_ptr() = new Alias<Class>(std::move(base));
76 [[noreturn]] void construct_alias_from_cpp(std::false_type /*!is_alias_constructible*/,
86 static_assert(!std::is_same<Class, Class>::value /* always false */,
110 Holder<Class> temp_holder(std
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/gem5/src/arch/arm/kvm/
H A Dbase_cpu.hh67 typedef std::vector<uint64_t> RegIndexVector;
94 std::unique_ptr<struct kvm_reg_list> tryGetRegList(uint64_t nelem) const;
/gem5/src/mem/
H A Dstack_dist_calc.hh181 typedef std::map<uint64_t, Node*> IndexNodeMap;
182 typedef std::map<Addr, uint64_t> AddressIndexMap;
183 typedef std::vector<IndexNodeMap> TreeType;
315 static constexpr uint64_t Infinity = std::numeric_limits<uint64_t>::max();
328 std::pair<uint64_t, bool> calcStackDist(const Addr r_address,
343 std::pair<uint64_t, bool> calcStackDistAndUpdate(const Addr r_address,
407 std::vector<uint64_t> nextIndex;
410 std::vector<uint64_t> stack;
/gem5/src/mem/ruby/network/simple/
H A DSimpleLink.cc42 SimpleExtLink::print(std::ostream& out) const
64 SimpleIntLink::print(std::ostream& out) const
/gem5/ext/systemc/src/sysc/communication/
H A Dsc_event_finder.cpp47 std::sprintf( msg, "%s: port '%s' (%s)",
50 std::sprintf( msg, "port '%s' (%s)", m_port.name(), m_port.kind() );

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